From 15917b16022427c53755abff4dc7051f3076dd7a Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Tue, 2 Sep 2014 10:15:16 +0200 Subject: clk: mvebu: Fix clk frequency value if SSCG is enabled When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts the frequency of the clock. The percentage is no more than 1% but when the clock is used for a timer it leads to a clock drift. This patch allows to correct the affected clock when the SSCG is enabled. The check is done in an new optional function related to each SoC: is_sscg_enabled(). The fix is done with the other new optional function related to each SoC: fix_sscg_deviation. If one these functions are not present then no correction is done on the clock frequency. Signed-off-by: Gregory CLEMENT Tested-by: Leigh Brown Link: https://lkml.kernel.org/r/1409645719-20003-2-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper --- drivers/clk/mvebu/common.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/clk/mvebu/common.h') diff --git a/drivers/clk/mvebu/common.h b/drivers/clk/mvebu/common.h index f968b4d9df92..59efaa850bde 100644 --- a/drivers/clk/mvebu/common.h +++ b/drivers/clk/mvebu/common.h @@ -28,6 +28,8 @@ struct coreclk_soc_desc { u32 (*get_tclk_freq)(void __iomem *sar); u32 (*get_cpu_freq)(void __iomem *sar); void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); + bool (*is_sscg_enabled)(void __iomem *sar); + u32 (*fix_sscg_deviation)(struct device_node *np, u32 system_clk); const struct coreclk_ratio *ratios; int num_ratios; }; @@ -45,4 +47,9 @@ void __init mvebu_coreclk_setup(struct device_node *np, void __init mvebu_clk_gating_setup(struct device_node *np, const struct clk_gating_soc_desc *desc); +/* + * This function is shared among the Kirkwood, Armada 370, Armada XP + * and Armada 375 SoC + */ +u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk); #endif -- cgit 1.4.1