From c2c62e61fb8559420bb0346953843e557cdddba7 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Fri, 19 Apr 2013 21:01:31 +0400 Subject: xtensa: xtfpga: add audio card to xtfpga DTS This includes OpenCores I2C host controller, TI CDCE706 clock generator, xtfpga I2S master controller, xtfpga SPI master controller, TI TLV320AIC23 audio codec and a simple audio card. Signed-off-by: Max Filippov --- arch/xtensa/boot/dts/xtfpga.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) (limited to 'arch') diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi index dec9178840f6..cd0b9e34adc8 100644 --- a/arch/xtensa/boot/dts/xtfpga.dtsi +++ b/arch/xtensa/boot/dts/xtfpga.dtsi @@ -40,6 +40,12 @@ #clock-cells = <0>; compatible = "fixed-clock"; }; + + clk54: clk54 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <54000000>; + }; }; soc { @@ -65,5 +71,63 @@ local-mac-address = [00 50 c2 13 6f 00]; clocks = <&osc>; }; + + i2s0: xtfpga-i2s@0d080000 { + #sound-dai-cells = <0>; + compatible = "cdns,xtfpga-i2s"; + reg = <0x0d080000 0x40>; + interrupts = <2 1>; /* external irq 2 */ + clocks = <&cdce706 4>; + }; + + i2c0: i2c-master@0d090000 { + compatible = "opencores,i2c-ocores"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0d090000 0x20>; + reg-shift = <2>; + reg-io-width = <1>; + interrupts = <4 1>; + clocks = <&osc>; + + cdce706: clock-synth@69 { + compatible = "ti,cdce706"; + #clock-cells = <1>; + reg = <0x69>; + clocks = <&clk54>; + clock-names = "clk_in0"; + }; + }; + + spi0: spi-master@0d0a0000 { + compatible = "cdns,xtfpga-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0d0a0000 0xc>; + + tlv320aic23: sound-codec@0 { + #sound-dai-cells = <0>; + compatible = "tlv320aic23"; + reg = <0>; + spi-max-frequency = <12500000>; + }; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s0>; + }; + + simple-audio-card,codec { + sound-dai = <&tlv320aic23>; + simple-audio-card,bitclock-master = <0>; + simple-audio-card,frame-master = <0>; + clocks = <&cdce706 4>; + }; }; }; -- cgit 1.4.1 From 04ddc5b5ad4eca2b96160663431f041bec2efc2e Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sat, 7 Feb 2015 12:47:56 +0300 Subject: xtensa: xtfpga: provide defconfig with audio subsystem This is the generic KC705 defconfig with all pieces of xtfpga audio subsystem enabled: I2C, SPI and ASoC support, I2C master, SPI master, clock synthesizer, I2S master, audio codec and audio card drivers. Signed-off-by: Max Filippov --- arch/xtensa/configs/audio_kc705_defconfig | 142 ++++++++++++++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 arch/xtensa/configs/audio_kc705_defconfig (limited to 'arch') diff --git a/arch/xtensa/configs/audio_kc705_defconfig b/arch/xtensa/configs/audio_kc705_defconfig new file mode 100644 index 000000000000..c4904db15582 --- /dev/null +++ b/arch/xtensa/configs/audio_kc705_defconfig @@ -0,0 +1,142 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_FHANDLE=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_MEMCG=y +CONFIG_NAMESPACES=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_XTENSA_VARIANT_CUSTOM=y +CONFIG_XTENSA_VARIANT_CUSTOM_NAME="test_kc705_hifi" +CONFIG_XTENSA_UNALIGNED_USER=y +CONFIG_PREEMPT=y +CONFIG_HIGHMEM=y +# CONFIG_PCI is not set +CONFIG_XTENSA_PLATFORM_XTFPGA=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug" +CONFIG_USE_OF=y +CONFIG_BUILTIN_DTB="kc705" +# CONFIG_COMPACTION is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_IPV6 is not set +CONFIG_NETFILTER=y +# CONFIG_WIRELESS is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_MTD=y +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_UBI=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_MARVELL_PHY=y +# CONFIG_WLAN is not set +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_HW_RANDOM=y +CONFIG_I2C=y +CONFIG_I2C_OCORES=y +CONFIG_SPI=y +CONFIG_SPI_XTENSA_XTFPGA=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_SOFT_WATCHDOG=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_XTFPGA_I2S=y +CONFIG_SND_SOC_TLV320AIC23_SPI=y +CONFIG_SND_SIMPLE_CARD=y +# CONFIG_USB_SUPPORT is not set +CONFIG_COMMON_CLK_CDCE706=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS=y +CONFIG_FANOTIFY=y +CONFIG_VFAT_FS=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y +CONFIG_ROOT_NFS=y +CONFIG_SUNRPC_DEBUG=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_LOCKUP_DETECTOR=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_ATOMIC_SLEEP=y +CONFIG_STACKTRACE=y +CONFIG_RCU_TRACE=y +# CONFIG_FTRACE is not set +# CONFIG_S32C1I_SELFTEST is not set +CONFIG_CRYPTO_ANSI_CPRNG=y -- cgit 1.4.1 From bba0f0e1d39767ff98fbf6393c89a573203915eb Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 3 Feb 2015 06:22:04 +0800 Subject: ARM: sunxi_defconfig: Enable CONFIG_PHY_SUN9I_USB On sun9i we have a new PHY driver for USB. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/configs/sunxi_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig index 38840a812924..6b271645eb43 100644 --- a/arch/arm/configs/sunxi_defconfig +++ b/arch/arm/configs/sunxi_defconfig @@ -106,6 +106,7 @@ CONFIG_RTC_DRV_SUN6I=y CONFIG_RTC_DRV_SUNXI=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_PHY_SUN4I_USB=y +CONFIG_PHY_SUN9I_USB=y CONFIG_EXT4_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y -- cgit 1.4.1 From ef146afaa87b4a2a2e7a51fc8bfd40de98a42b2f Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 3 Feb 2015 06:22:05 +0800 Subject: ARM: multi_v7_defconfig: Enable CONFIG_PHY_SUN9I_USB On sun9i we have a new PHY driver for USB. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index e8a4c955241b..e1f9a79651ca 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -478,6 +478,7 @@ CONFIG_PHY_MIPHY365X=y CONFIG_PHY_STIH41X_USB=y CONFIG_PHY_STIH407_USB=y CONFIG_PHY_SUN4I_USB=y +CONFIG_PHY_SUN9I_USB=y CONFIG_EXT4_FS=y CONFIG_AUTOFS4_FS=y CONFIG_MSDOS_FS=y -- cgit 1.4.1 From a198d27cb4d34de1fde22989c5fa536a951f6303 Mon Sep 17 00:00:00 2001 From: Tyler Baker Date: Tue, 10 Feb 2015 19:52:28 -0800 Subject: ARM: sunxi_defconfig: increase the number of maximum number of CPUs to 8 The a80 optimus has 8 CPUs. I propose we increase the maximum number of CPUs to 8 to avoid the following warning identified during automated boot testing [1]. ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at ../arch/arm/kernel/devtree.c:144 arm_dt_init_cpu_maps+0x110/0x1e0() DT /cpu 5 nodes greater than max cores 4, capping them CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-00528-gbdccc4edeb03 #1 Hardware name: Allwinner sun9i Family [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x74/0x90) [] (dump_stack) from [] (warn_slowpath_common+0x70/0xac) [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40) [] (warn_slowpath_fmt) from [] (arm_dt_init_cpu_maps+0x110/0x1e0) [] (arm_dt_init_cpu_maps) from [] (setup_arch+0x634/0x8d4) [] (setup_arch) from [] (start_kernel+0x88/0x3ac) [] (start_kernel) from [<20008074>] (0x20008074) ---[ end trace cb88537fdc8fa200 ]--- [1] http://storage.kernelci.org/mainline/v3.19-528-gbdccc4edeb03/arm-sunxi_defconfig/lab-tbaker/boot-sun9i-a80-optimus.html Cc: Maxime Ripard Cc: Olof Johansson Cc: Kevin Hilman Cc: Arnd Bergmann Signed-off-by: Tyler Baker Signed-off-by: Maxime Ripard --- arch/arm/configs/sunxi_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig index 6b271645eb43..8ecba00dcd83 100644 --- a/arch/arm/configs/sunxi_defconfig +++ b/arch/arm/configs/sunxi_defconfig @@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y CONFIG_PERF_EVENTS=y CONFIG_ARCH_SUNXI=y CONFIG_SMP=y +CONFIG_NR_CPUS=8 CONFIG_AEABI=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y -- cgit 1.4.1 From f6db7029bb266fafe7679792514c1f26556fd61e Mon Sep 17 00:00:00 2001 From: Yunzhi Li Date: Fri, 12 Dec 2014 23:12:21 +0800 Subject: ARM: dts: rockchip: add rk3288 usb PHY This patch adds a device_node for RK3288 SoC usb phy. It also defines the phy to be used by three usb controllers: usb_host0/1 and usb_otg. Signed-off-by: Yunzhi Li Tested-by: Doug Anderson Reviewed-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index d771f687a13b..2c29a3e8bd43 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -419,6 +419,8 @@ interrupts = ; clocks = <&cru HCLK_USBHOST0>; clock-names = "usbhost"; + phys = <&usbphy1>; + phy-names = "usb"; status = "disabled"; }; @@ -431,6 +433,8 @@ interrupts = ; clocks = <&cru HCLK_USBHOST1>; clock-names = "otg"; + phys = <&usbphy2>; + phy-names = "usb2-phy"; status = "disabled"; }; @@ -441,6 +445,8 @@ interrupts = ; clocks = <&cru HCLK_OTG0>; clock-names = "otg"; + phys = <&usbphy0>; + phy-names = "usb2-phy"; status = "disabled"; }; @@ -697,6 +703,35 @@ interrupts = ; }; + usbphy: phy { + compatible = "rockchip,rk3288-usb-phy"; + rockchip,grf = <&grf>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + usbphy0: usb-phy0 { + #phy-cells = <0>; + reg = <0x320>; + clocks = <&cru SCLK_OTGPHY0>; + clock-names = "phyclk"; + }; + + usbphy1: usb-phy1 { + #phy-cells = <0>; + reg = <0x334>; + clocks = <&cru SCLK_OTGPHY1>; + clock-names = "phyclk"; + }; + + usbphy2: usb-phy2 { + #phy-cells = <0>; + reg = <0x348>; + clocks = <&cru SCLK_OTGPHY2>; + clock-names = "phyclk"; + }; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3288-pinctrl"; rockchip,grf = <&grf>; -- cgit 1.4.1 From e537c9ccfab694281de8b6966bfa14e8d2bd9a69 Mon Sep 17 00:00:00 2001 From: Yunzhi Li Date: Fri, 12 Dec 2014 23:17:02 +0800 Subject: ARM: dts: rockchip: Enable usb PHY on rk3288-evb board Enable usb PHY for all usb ports on rk3288-evb. Signed-off-by: Yunzhi Li Reviewed-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 5e895a514a0b..287a1622d1be 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -238,6 +238,10 @@ }; }; +&usbphy { + status = "okay"; +}; + &usb_host0_ehci { status = "okay"; }; -- cgit 1.4.1 From 055b0c6753f315ad6922b86bdfa352733de5f674 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 19 Feb 2015 22:46:45 +0100 Subject: ARM: dts: rockchip: enable usbphy on rk3288-firefly Enable the usb phys on the firefly board. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-firefly.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi index e6f873abbe0d..b9dda411e569 100644 --- a/arch/arm/boot/dts/rk3288-firefly.dtsi +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi @@ -459,6 +459,10 @@ status = "okay"; }; +&usbphy { + status = "okay"; +}; + &usb_host1 { pinctrl-names = "default"; pinctrl-0 = <&usbhub_rst>; -- cgit 1.4.1 From f36abc869886ac91f88c72d21835497686228558 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 20 Feb 2015 01:31:57 +0100 Subject: ARM: dts: rockchip: enable gmac on rk3288-firefly This was left out of the original firefly board definition due to the ethernet support going completely through the network tree, making the underlying nodes unavailable. Now that everything is present enable the gmac on the firefly. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-firefly.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi index b9dda411e569..b54dd78580c1 100644 --- a/arch/arm/boot/dts/rk3288-firefly.dtsi +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi @@ -179,6 +179,22 @@ status = "okay"; }; +&gmac { + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + clock_in_out = "input"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; + tx_delay = <0x30>; + rx_delay = <0x10>; + status = "ok"; +}; + &hdmi { ddc-i2c-bus = <&i2c5>; status = "okay"; -- cgit 1.4.1 From b757258a5e47a4d46dd1ea03cbbe1f10122b9e39 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 29 Jan 2015 12:36:28 +0100 Subject: ARM: mvebu: Use macros for interrupt flags on Armada 38x sdhci node Instead of hardcoding the values of the interrupt flags, use the macros provided by and for the Armada 38x SDHCI node. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-38x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 1dff30a81e24..efff46b11a8a 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -549,7 +549,7 @@ sdhci@d8000 { compatible = "marvell,armada-380-sdhci"; reg = <0xd8000 0x1000>, <0xdc000 0x100>; - interrupts = <0 25 0x4>; + interrupts = ; clocks = <&gateclk 17>; mrvl,clk-delay-cycles = <0x1F>; status = "disabled"; -- cgit 1.4.1 From ddbdc5790fb9274a5aeed49081152842d17b0932 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 29 Jan 2015 12:36:29 +0100 Subject: ARM: mvebu: Update the SDHCI node on Armada 38x The binding of the armada-380-sdhci has been extended with a new register in order to be able to use the SDR50 and DDR50 mode. This commit add the resource associated to this new register for the Armada 38x. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-38x.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index efff46b11a8a..cb30fb82a046 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -548,7 +548,10 @@ sdhci@d8000 { compatible = "marvell,armada-380-sdhci"; - reg = <0xd8000 0x1000>, <0xdc000 0x100>; + reg-names = "sdhci", "mbus", "conf-sdio3"; + reg = <0xd8000 0x1000>, + <0xdc000 0x100>, + <0x18454 0x4>; interrupts = ; clocks = <&gateclk 17>; mrvl,clk-delay-cycles = <0x1F>; -- cgit 1.4.1 From 444fdf947de3bf5ac6b6ac033eb9d877a4b7e90d Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 29 Jan 2015 12:36:30 +0100 Subject: ARM: mvebu: Add Device Tree description of SDHCI for Armada 388 RD The Device Tree description of SDHCI on Armada 388 RD board was missing. This commit adds the node for it. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-388-rd.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts index d99baac72081..1ecf511288c9 100644 --- a/arch/arm/boot/dts/armada-388-rd.dts +++ b/arch/arm/boot/dts/armada-388-rd.dts @@ -85,6 +85,16 @@ clock-frequency = <100000>; }; + sdhci@d8000 { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + broken-cd; + no-1-8-v; + wp-inverted; + bus-width = <8>; + status = "okay"; + }; + serial@12000 { status = "okay"; }; -- cgit 1.4.1 From aa01bf614842e774b093f4f02cbc0d473f479e7c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 20 Jan 2015 14:08:13 +0100 Subject: ARM: shmobile: Enable ape6evm board in multiplatform defconfig Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/configs/shmobile_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index b17036088726..21851f87e439 100644 --- a/arch/arm/configs/shmobile_defconfig +++ b/arch/arm/configs/shmobile_defconfig @@ -12,6 +12,7 @@ CONFIG_SLAB=y CONFIG_ARCH_SHMOBILE_MULTI=y CONFIG_ARCH_EMEV2=y CONFIG_ARCH_R7S72100=y +CONFIG_ARCH_R8A73A4=y CONFIG_ARCH_R8A7740=y CONFIG_ARCH_R8A7779=y CONFIG_ARCH_R8A7790=y @@ -121,6 +122,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_AS3711=y CONFIG_REGULATOR_DA9210=y CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_MAX8973=y CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_CONTROLLER=y -- cgit 1.4.1 From fe7c20fa689d3b9230be0b552f667c043d11ed75 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 21 Jan 2015 17:17:39 +0100 Subject: ARM: shmobile: r8a7740 dtsi: add remaining DIV6 clocks This adds the remaining DIV6 clocks and all possible parents for the SUB clock. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740.dtsi | 79 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 78 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 8a092605d641..83c1c3ca1b8f 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -431,6 +431,18 @@ clock-frequency = <27000000>; clock-output-names = "dv"; }; + fmsick_clk: fmsick_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "fmsick"; + }; + fmsock_clk: fmsock_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "fmsock"; + }; fsiack_clk: fsiack_clk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -459,13 +471,78 @@ }; /* Variable factor clocks (DIV6) */ + vclk1_clk: vclk1_clk@e6150008 { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe6150008 4>; + clocks = <&pllc1_div2_clk>, <0>, <&dv_clk>, + <&cpg_clocks R8A7740_CLK_USB24S>, + <&extal1_div2_clk>, <&extalr_clk>, <0>, + <0>; + #clock-cells = <0>; + clock-output-names = "vclk1"; + }; + vclk2_clk: vclk2_clk@e615000c { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe615000c 4>; + clocks = <&pllc1_div2_clk>, <0>, <&dv_clk>, + <&cpg_clocks R8A7740_CLK_USB24S>, + <&extal1_div2_clk>, <&extalr_clk>, <0>, + <0>; + #clock-cells = <0>; + clock-output-names = "vclk2"; + }; + fmsi_clk: fmsi_clk@e6150010 { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe6150010 4>; + clocks = <&pllc1_div2_clk>, <&fmsick_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "fmsi"; + }; + fmso_clk: fmso_clk@e6150014 { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe6150014 4>; + clocks = <&pllc1_div2_clk>, <&fmsock_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "fmso"; + }; + fsia_clk: fsia_clk@e6150018 { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe6150018 4>; + clocks = <&pllc1_div2_clk>, <&fsiack_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "fsia"; + }; sub_clk: sub_clk@e6150080 { compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150080 4>; - clocks = <&pllc1_div2_clk>; + clocks = <&pllc1_div2_clk>, + <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>; #clock-cells = <0>; clock-output-names = "sub"; }; + spu_clk: spu_clk@e6150084 { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe6150084 4>; + clocks = <&pllc1_div2_clk>, + <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "spu"; + }; + vou_clk: vou_clk@e6150088 { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe6150088 4>; + clocks = <&pllc1_div2_clk>, <&extal1_clk>, <&dv_clk>, + <0>; + #clock-cells = <0>; + clock-output-names = "vou"; + }; + stpro_clk: stpro_clk@e615009c { + compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock"; + reg = <0xe615009c 4>; + clocks = <&cpg_clocks R8A7740_CLK_PLLC0>; + #clock-cells = <0>; + clock-output-names = "stpro"; + }; /* Fixed factor clocks */ pllc1_div2_clk: pllc1_div2_clk { -- cgit 1.4.1 From 48bdf06dd975fb01e54e0b0406de720ebeeb55c7 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 6 Jan 2015 20:42:04 +0100 Subject: ARM: shmobile: sh73a0 dtsi: Set control-parent for all irqpin nodes The sh73a0 INTC can't mask interrupts properly most likely due to a hardware bug. Set the control-parent property to delegate masking to the parent interrupt controller. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 2dfd5b44255d..076708797ef6 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -94,6 +94,7 @@ 0 6 IRQ_TYPE_LEVEL_HIGH 0 7 IRQ_TYPE_LEVEL_HIGH 0 8 IRQ_TYPE_LEVEL_HIGH>; + control-parent; }; irqpin1: irqpin@e6900004 { @@ -133,6 +134,7 @@ 0 22 IRQ_TYPE_LEVEL_HIGH 0 23 IRQ_TYPE_LEVEL_HIGH 0 24 IRQ_TYPE_LEVEL_HIGH>; + control-parent; }; irqpin3: irqpin@e690000c { @@ -152,6 +154,7 @@ 0 30 IRQ_TYPE_LEVEL_HIGH 0 31 IRQ_TYPE_LEVEL_HIGH 0 32 IRQ_TYPE_LEVEL_HIGH>; + control-parent; }; i2c0: i2c@e6820000 { -- cgit 1.4.1 From 5c9e276095a9607f530f94e219daf2996b1360fa Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:42:05 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Sort i2c0 children by unit address While at it rename the ak4648 node to "codec" to describe the device's function instead of its model, and move its device-specific property after its generic properties. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 6d32c87632d4..0134d53f9f41 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -188,6 +188,13 @@ &i2c0 { status = "okay"; + + ak4648: codec@12 { + compatible = "asahi-kasei,ak4648"; + reg = <0x12>; + #sound-dai-cells = <0>; + }; + as3711@40 { compatible = "ams,as3711"; reg = <0x40>; @@ -258,12 +265,6 @@ }; }; }; - - ak4648: ak4648@12 { - #sound-dai-cells = <0>; - compatible = "asahi-kasei,ak4648"; - reg = <0x12>; - }; }; &i2c3 { -- cgit 1.4.1 From 56b7271c9dbf029d288e4fbcae72e405e56ae856 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:42:06 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Add ak8975 magnetometer node Add a DT node for the AK8975 magnetometer sensor, which is connected to i2c0. Signed-off-by: Geert Uytterhoeven Specify the device interrupt to avoid polling for end of conversion. While at it rename the DT node to compass@c to describe the device's function instead of its model. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 0134d53f9f41..873b4157ea4c 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -189,6 +189,13 @@ &i2c0 { status = "okay"; + compass@c { + compatible = "asahi-kasei,ak8975"; + reg = <0x0c>; + interrupt-parent = <&irqpin3>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + }; + ak4648: codec@12 { compatible = "asahi-kasei,ak4648"; reg = <0x12>; -- cgit 1.4.1 From 4bd1dd503aa2a6cfeb18a48d1da01662dd5124e1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:42:07 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Add adxl345 accelerometer node Add a DT node for the ADXL345 three-axis digital accelerometer sensor, which is connected to i2c0. As trivial i2c devices are matched against the first compatible entry only, compatibility is declared with "adi,adxl34x" only for now. Signed-off-by: Geert Uytterhoeven The device needs an interrupt to operate properly. Specify the two interrupts used on the board. While at it rename the DT node to accelerometer@1d to describe the device's function instead of its model. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 873b4157ea4c..fd16998b92de 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -202,6 +202,14 @@ #sound-dai-cells = <0>; }; + accelerometer@1d { + compatible = "adi,adxl34x"; + reg = <0x1d>; + interrupt-parent = <&irqpin3>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, + <3 IRQ_TYPE_LEVEL_HIGH>; + }; + as3711@40 { compatible = "ams,as3711"; reg = <0x40>; -- cgit 1.4.1 From 070048dc8879499533f587b8ebdb990f5a29d08b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:42:08 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Add r2025sd rtc node Add a DT node for the R2025D real-time clock, which is connected to i2c0. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index fd16998b92de..e3723be251db 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -210,6 +210,11 @@ <3 IRQ_TYPE_LEVEL_HIGH>; }; + rtc@32 { + compatible = "ricoh,r2025sd"; + reg = <0x32>; + }; + as3711@40 { compatible = "ams,as3711"; reg = <0x40>; -- cgit 1.4.1 From 8ac627fa8ef0f98f914690515aa3bf376d7a880d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 6 Jan 2015 20:42:09 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Add st1232 touchscreen node Enable the kzm9g touchscreen controller in the board's DT file. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index e3723be251db..0156fc8e9e4d 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -287,6 +287,17 @@ }; }; +&i2c1 { + status = "okay"; + + touchscreen@55 { + compatible = "sitronix,st1232"; + reg = <0x55>; + interrupt-parent = <&irqpin1>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + }; +}; + &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; -- cgit 1.4.1 From 56a215d66b1eee870a6b90a8c245dfc3e503a137 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:56:05 +0100 Subject: ARM: shmobile: sh73a0 dtsi: Add missing INTCA0 clock for irqpin module This clock drives the irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. By making it available to the driver, we make sure it gets enabled when needed, and allow it to be managed by system or runtime PM. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 15 +++++++++++++++ include/dt-bindings/clock/sh73a0-clock.h | 3 +++ 2 files changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 076708797ef6..08f736d52179 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -94,6 +94,7 @@ 0 6 IRQ_TYPE_LEVEL_HIGH 0 7 IRQ_TYPE_LEVEL_HIGH 0 8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; control-parent; }; @@ -114,6 +115,7 @@ 0 14 IRQ_TYPE_LEVEL_HIGH 0 15 IRQ_TYPE_LEVEL_HIGH 0 16 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; control-parent; }; @@ -134,6 +136,7 @@ 0 22 IRQ_TYPE_LEVEL_HIGH 0 23 IRQ_TYPE_LEVEL_HIGH 0 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; control-parent; }; @@ -154,6 +157,7 @@ 0 30 IRQ_TYPE_LEVEL_HIGH 0 31 IRQ_TYPE_LEVEL_HIGH 0 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; control-parent; }; @@ -698,5 +702,16 @@ clock-output-names = "iic3", "iic4", "keysc"; }; + mstp5_clks: mstp5_clks@e6150144 { + compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xe6150144 4>, <0xe615003c 4>; + clocks = <&cpg_clocks SH73A0_CLK_HP>; + #clock-cells = <1>; + clock-indices = < + SH73A0_CLK_INTCA0 + >; + clock-output-names = + "intca0"; + }; }; }; diff --git a/include/dt-bindings/clock/sh73a0-clock.h b/include/dt-bindings/clock/sh73a0-clock.h index 1dd3eb2b7d90..53369568c24c 100644 --- a/include/dt-bindings/clock/sh73a0-clock.h +++ b/include/dt-bindings/clock/sh73a0-clock.h @@ -76,4 +76,7 @@ #define SH73A0_CLK_IIC4 10 #define SH73A0_CLK_KEYSC 3 +/* MSTP5 */ +#define SH73A0_CLK_INTCA0 8 + #endif -- cgit 1.4.1 From 09940bf079454a17c0bc298a4ca3678ce530b858 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Tue, 6 Jan 2015 20:56:06 +0100 Subject: ARM: shmobile: sh73a0 dtsi: Add selectable sources to DIV6 clocks Specifies clock sources and register bits. Signed-off-by: Ulrich Hecht [geert: Drop renesas,src-shift/renesas,src-width, pad to 4 or 8 parents] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 64 ++++++++++++++++++++++++++++++------------- 1 file changed, 45 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 08f736d52179..ab319b73e282 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -433,133 +433,159 @@ vclk1_clk: vclk1_clk@e6150008 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150008 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&extcki_clk>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>, + <0>; #clock-cells = <0>; clock-output-names = "vclk1"; }; vclk2_clk: vclk2_clk@e615000c { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe615000c 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&extcki_clk>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>, + <0>; #clock-cells = <0>; clock-output-names = "vclk2"; }; vclk3_clk: vclk3_clk@e615001c { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe615001c 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&extcki_clk>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>, + <0>; #clock-cells = <0>; clock-output-names = "vclk3"; }; zb_clk: zb_clk@e6150010 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150010 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks SH73A0_CLK_PLL2>, <0>; #clock-cells = <0>; clock-output-names = "zb"; }; flctl_clk: flctl_clk@e6150014 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150014 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks SH73A0_CLK_PLL2>, <0>; #clock-cells = <0>; clock-output-names = "flctlck"; }; sdhi0_clk: sdhi0_clk@e6150074 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150074 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&pll1_div13_clk>, <0>; #clock-cells = <0>; clock-output-names = "sdhi0ck"; }; sdhi1_clk: sdhi1_clk@e6150078 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150078 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&pll1_div13_clk>, <0>; #clock-cells = <0>; clock-output-names = "sdhi1ck"; }; sdhi2_clk: sdhi2_clk@e615007c { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe615007c 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&pll1_div13_clk>, <0>; #clock-cells = <0>; clock-output-names = "sdhi2ck"; }; fsia_clk: fsia_clk@e6150018 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150018 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&fsiack_clk>, <&fsiack_clk>; #clock-cells = <0>; clock-output-names = "fsia"; }; fsib_clk: fsib_clk@e6150090 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150090 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&fsibck_clk>, <&fsibck_clk>; #clock-cells = <0>; clock-output-names = "fsib"; }; sub_clk: sub_clk@e6150080 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150080 4>; - clocks = <&extal2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&extal2_clk>, <&extal2_clk>; #clock-cells = <0>; clock-output-names = "sub"; }; spua_clk: spua_clk@e6150084 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150084 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&extal2_clk>, <&extal2_clk>; #clock-cells = <0>; clock-output-names = "spua"; }; spuv_clk: spuv_clk@e6150094 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150094 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&extal2_clk>, <&extal2_clk>; #clock-cells = <0>; clock-output-names = "spuv"; }; msu_clk: msu_clk@e6150088 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150088 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks SH73A0_CLK_PLL2>, <0>; #clock-cells = <0>; clock-output-names = "msu"; }; hsi_clk: hsi_clk@e615008c { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe615008c 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&pll1_div7_clk>, <0>; #clock-cells = <0>; clock-output-names = "hsi"; }; mfg1_clk: mfg1_clk@e6150098 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150098 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks SH73A0_CLK_PLL2>, <0>; #clock-cells = <0>; clock-output-names = "mfg1"; }; mfg2_clk: mfg2_clk@e615009c { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe615009c 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks SH73A0_CLK_PLL2>, <0>; #clock-cells = <0>; clock-output-names = "mfg2"; }; dsit_clk: dsit_clk@e6150060 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150060 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks SH73A0_CLK_PLL2>, <0>; #clock-cells = <0>; clock-output-names = "dsit"; }; dsi0p_clk: dsi0p_clk@e6150064 { compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock"; reg = <0xe6150064 4>; - clocks = <&pll1_div2_clk>; + clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>, + <&cpg_clocks SH73A0_CLK_MAIN>, <&extal2_clk>, + <&extcki_clk>, <0>, <0>, <0>; #clock-cells = <0>; clock-output-names = "dsi0pck"; }; -- cgit 1.4.1 From 89ebd5459c3c43536f3dbec19216e97179647673 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:17:38 +0100 Subject: ARM: shmobile: kzm9g dts: Declare the full 512 MiB of RAM Traditionally, the first 16 MiB of RAM was reserved for the RT processor. However, this is incompatible with CONFIG_AUTO_ZRELADDR=y, which requires that the start address of physical memory is a multiple of 128 MiB. As CONFIG_AUTO_ZRELADDR=y is enabled for multi-platform kernels, declare RAM to start at 0x40000000. While at it, reclaim the last 8 MiB of RAM, too, so the full 512 MiB is available. Note that kzm9g_defconfig still has CONFIG_MEMORY_START=0x41000000 and CONFIG_MEMORY_SIZE=0x1f000000, so before the advent of DT we scribbled over the last 8 MiB, too. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts index 27c5f426d172..e7dae01933a5 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts @@ -21,6 +21,6 @@ memory { device_type = "memory"; - reg = <0x41000000 0x1e800000>; + reg = <0x40000000 0x20000000>; }; }; -- cgit 1.4.1 From 3ce1bc08efdd1c1dfba123e802604c0e853ae5db Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 20:17:39 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Declare the full 512 MiB of RAM Traditionally, the first 16 MiB of RAM was reserved for the RT processor. However, this is incompatible with CONFIG_AUTO_ZRELADDR=y, which requires that the start address of physical memory is a multiple of 128 MiB. As CONFIG_AUTO_ZRELADDR=y is enabled for multi-platform kernels, declare RAM to start at 0x40000000. While at it, reclaim the last 8 MiB of RAM, too, so the full 512 MiB is available. Note that kzm9g_defconfig still has CONFIG_MEMORY_START=0x41000000 and CONFIG_MEMORY_SIZE=0x1f000000, so before the advent of DT we scribbled over the last 8 MiB, too. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 0156fc8e9e4d..bf365f7fef47 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -45,7 +45,7 @@ memory { device_type = "memory"; - reg = <0x41000000 0x1e800000>; + reg = <0x40000000 0x20000000>; }; reg_1p8v: regulator@0 { -- cgit 1.4.1 From bd8474853f9de32a963fb06569552833f756b63d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 27 Jan 2015 19:12:17 +0200 Subject: ARM: shmobile: r8a7794: Add DMAC devices to DT Instantiate the two system DMA controllers in the r8a7794 device tree. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 8f78da5ef10b..74745356afe2 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -107,6 +107,66 @@ <0 17 IRQ_TYPE_LEVEL_HIGH>; }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x20000>; + interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH + 0 200 IRQ_TYPE_LEVEL_HIGH + 0 201 IRQ_TYPE_LEVEL_HIGH + 0 202 IRQ_TYPE_LEVEL_HIGH + 0 203 IRQ_TYPE_LEVEL_HIGH + 0 204 IRQ_TYPE_LEVEL_HIGH + 0 205 IRQ_TYPE_LEVEL_HIGH + 0 206 IRQ_TYPE_LEVEL_HIGH + 0 207 IRQ_TYPE_LEVEL_HIGH + 0 208 IRQ_TYPE_LEVEL_HIGH + 0 209 IRQ_TYPE_LEVEL_HIGH + 0 210 IRQ_TYPE_LEVEL_HIGH + 0 211 IRQ_TYPE_LEVEL_HIGH + 0 212 IRQ_TYPE_LEVEL_HIGH + 0 213 IRQ_TYPE_LEVEL_HIGH + 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC0>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <15>; + }; + + dmac1: dma-controller@e6720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xe6720000 0 0x20000>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH + 0 216 IRQ_TYPE_LEVEL_HIGH + 0 217 IRQ_TYPE_LEVEL_HIGH + 0 218 IRQ_TYPE_LEVEL_HIGH + 0 219 IRQ_TYPE_LEVEL_HIGH + 0 308 IRQ_TYPE_LEVEL_HIGH + 0 309 IRQ_TYPE_LEVEL_HIGH + 0 310 IRQ_TYPE_LEVEL_HIGH + 0 311 IRQ_TYPE_LEVEL_HIGH + 0 312 IRQ_TYPE_LEVEL_HIGH + 0 313 IRQ_TYPE_LEVEL_HIGH + 0 314 IRQ_TYPE_LEVEL_HIGH + 0 315 IRQ_TYPE_LEVEL_HIGH + 0 316 IRQ_TYPE_LEVEL_HIGH + 0 317 IRQ_TYPE_LEVEL_HIGH + 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7794_CLK_SYS_DMAC1>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <15>; + }; + scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; -- cgit 1.4.1 From 70496727c08262c69cbeac10dfefada745b46869 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 27 Jan 2015 11:13:23 +0200 Subject: ARM: shmobile: r8a7790: Add IPMMU DT nodes Add the six IPMMU instances found in the r8a7790 to DT with a disabled status. Signed-off-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 51 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 4b38fc920114..24de994443e1 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1465,4 +1465,55 @@ ssi9: ssi@9 { interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; }; }; }; + + ipmmu_sy0: mmu@e6280000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6280000 0 0x1000>; + interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, + <0 224 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_sy1: mmu@e6290000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6290000 0 0x1000>; + interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds: mmu@e6740000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6740000 0 0x1000>; + interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, + <0 199 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp: mmu@ec680000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xec680000 0 0x1000>; + interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mx: mmu@fe951000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xfe951000 0 0x1000>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, + <0 221 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xffc80000 0 0x1000>; + interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; }; -- cgit 1.4.1 From f1951852ed17684f6033e96a9faf3dbe67c163ae Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 27 Jan 2015 11:13:24 +0200 Subject: ARM: shmobile: r8a7791: Add IPMMU DT nodes Add the seven IPMMU instances found in the r8a7791 to DT with a disabled status. Signed-off-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index e35812a0d8d4..43fb58a4c968 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1384,6 +1384,66 @@ status = "disabled"; }; + ipmmu_sy0: mmu@e6280000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6280000 0 0x1000>; + interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, + <0 224 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_sy1: mmu@e6290000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6290000 0 0x1000>; + interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds: mmu@e6740000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6740000 0 0x1000>; + interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, + <0 199 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mp: mmu@ec680000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xec680000 0 0x1000>; + interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mx: mmu@fe951000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xfe951000 0 0x1000>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, + <0 221 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_rt: mmu@ffc80000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xffc80000 0 0x1000>; + interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_gp: mmu@e62a0000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe62a0000 0 0x1000>; + interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>, + <0 261 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + rcar_sound: rcar_sound@ec500000 { /* * #sound-dai-cells is required -- cgit 1.4.1 From 1cb2794f608244312515ac41e82378cb2d58d74e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 27 Jan 2015 11:13:25 +0200 Subject: ARM: shmobile: r8a7794: Add IPMMU DT nodes Add the six IPMMU instances found in the r8a7794 to DT with a disabled status. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 50 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 74745356afe2..6f70bc426604 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -645,4 +645,54 @@ clock-output-names = "scifa3", "scifa4", "scifa5"; }; }; + + ipmmu_sy0: mmu@e6280000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6280000 0 0x1000>; + interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, + <0 224 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_sy1: mmu@e6290000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6290000 0 0x1000>; + interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_ds: mmu@e6740000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe6740000 0 0x1000>; + interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, + <0 199 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + }; + + ipmmu_mp: mmu@ec680000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xec680000 0 0x1000>; + interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; + + ipmmu_mx: mmu@fe951000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xfe951000 0 0x1000>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, + <0 221 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + }; + + ipmmu_gp: mmu@e62a0000 { + compatible = "renesas,ipmmu-vmsa"; + reg = <0 0xe62a0000 0 0x1000>; + interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>, + <0 261 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <1>; + status = "disabled"; + }; }; -- cgit 1.4.1 From 82818d3482badfa88f66b3abbac838daf7e35b97 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 27 Jan 2015 10:45:55 +0200 Subject: ARM: shmobile: r8a7794: Add ethernet controller to device tree Add a DT node for the on-SoC ethernet controller device. Signed-off-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 6f70bc426604..63b918b1e45f 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -329,6 +329,17 @@ status = "disabled"; }; + ether: ethernet@ee700000 { + compatible = "renesas,ether-r8a7794"; + reg = <0 0xee700000 0 0x400>; + interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp8_clks R8A7794_CLK_ETHER>; + phy-mode = "rmii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>; -- cgit 1.4.1 From a895b7cda38cd2fa155be22b531d164f17ec84ec Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 27 Jan 2015 10:45:56 +0200 Subject: ARM: shmobile: r8a7794: alt: Enable ethernet controller Enable the ethernet controller for the Alt board. Pin muxing entries are currently left out as r8a7794 pin control support isn't available yet. We thus rely on the boot loader to configure ethernet pins for now. Signed-off-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 0d848e605071..25bf434433b1 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -43,6 +43,19 @@ status = "okay"; }; +ðer { + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&irqc0>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +}; + &scif2 { status = "okay"; }; -- cgit 1.4.1 From 5e7e155483dfbf590be9b05e53ae954dced73253 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 5 Jan 2015 09:40:49 +0900 Subject: ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-names * Correct base address of SD3 div6 clk. * Update div6 clock node labels There appears to have been some inconsistency and confusion here as on the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3. This has no run-time affect as the clock nodes are not currently used. Fixes: 8e181633e6ca96049 ("ARM: shmobile: r8a7794: Add SDHI clocks to device tree") Reported-by: Sergei Shtylyov Reported-by: Geert Uytterhoeven Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 63b918b1e45f..fff9497bd652 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -365,19 +365,19 @@ "lb", "qspi", "sdh", "sd0", "z"; }; /* Variable factor clocks */ - sd1_clk: sd2_clk@e6150078 { + sd2_clk: sd2_clk@e6150078 { compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe6150078 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd1"; + clock-output-names = "sd2"; }; - sd2_clk: sd3_clk@e615007c { + sd3_clk: sd3_clk@e615026c { compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; - reg = <0 0xe615007c 0 4>; + reg = <0 0xe615026c 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd2"; + clock-output-names = "sd3"; }; mmc0_clk: mmc0_clk@e6150240 { compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; @@ -589,7 +589,7 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>, + clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < -- cgit 1.4.1 From 2ea0d4ec39ac837e34c07b4783a7c900940e6eaf Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 29 Jan 2015 10:41:24 +0900 Subject: ARM: shmobile: r8a7791: Correct SDHI clock labels and output-names There appears to have been some inconsistency and confusion here as on the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3. Fixes: 59e79895b95892863 ("ARM: shmobile: r8a7791: Add clocks") Reported-by: Geert Uytterhoeven Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 43fb58a4c968..afba8af1a5e4 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -874,19 +874,19 @@ }; /* Variable factor clocks */ - sd1_clk: sd2_clk@e6150078 { + sd2_clk: sd2_clk@e6150078 { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe6150078 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd1"; + clock-output-names = "sd2"; }; - sd2_clk: sd3_clk@e615026c { + sd3_clk: sd3_clk@e615026c { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe615026c 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd2"; + clock-output-names = "sd3"; }; mmc0_clk: mmc0_clk@e6150240 { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; @@ -1107,7 +1107,7 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>, + clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; -- cgit 1.4.1 From 83a0731b39f3bc2421960e6169f8440ca673a20f Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 11 Dec 2014 01:42:12 +0200 Subject: ARM: shmobile: koelsch: Add DU HDMI output support Add DT nodes for the ADV7511 HDMI encoder and its HDMI output connector and configure the DISP pin group that drives the HDMI transmitter DE pin. Signed-off-by: Laurent Pinchart Acked-by: Simon Horman Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 50 ++++++++++++++++++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index a3c27807f6c5..624bb2c30513 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -258,6 +258,17 @@ system-clock-frequency = <11289600>; }; }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; }; &du { @@ -266,6 +277,11 @@ status = "okay"; ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; port@1 { lvds_connector: endpoint { }; @@ -284,7 +300,7 @@ }; du_pins: du { - renesas,groups = "du_rgb666", "du_sync", "du_clk_out_0"; + renesas,groups = "du_rgb666", "du_sync", "du_disp", "du_clk_out_0"; renesas,function = "du"; }; @@ -506,6 +522,38 @@ }; }; + hdmi@39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + interrupt-parent = <&gpio3>; + interrupts = <29 IRQ_TYPE_EDGE_FALLING>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + eeprom@50 { compatible = "renesas,24c02"; reg = <0x50>; -- cgit 1.4.1 From 1d66f72d2c79b76b7353ea4e42f33521fa839f81 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 3 Feb 2015 15:57:41 +0100 Subject: ARM: shmobile: r8a7790: smp: remap whole apmu region Documentation says the last register is at 0x184 (CAxCPUCMCR), so use proper length. Current APMU code accesses CAxCPUnCR which is currently outside of the remapped area. Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7790.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index 9c3da1345b8b..a5bef873d37e 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -37,11 +37,11 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = { static struct rcar_apmu_config r8a7790_apmu_config[] = { { - .iomem = DEFINE_RES_MEM(0xe6152000, 0x88), + .iomem = DEFINE_RES_MEM(0xe6152000, 0x188), .cpus = { 0, 1, 2, 3 }, }, { - .iomem = DEFINE_RES_MEM(0xe6151000, 0x88), + .iomem = DEFINE_RES_MEM(0xe6151000, 0x188), .cpus = { 0x100, 0x0101, 0x102, 0x103 }, } }; -- cgit 1.4.1 From 98f60f8600694ce05c0cba34acce4d77acaea4f9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 3 Feb 2015 15:57:42 +0100 Subject: ARM: shmobile: r8a7791: smp: remap whole apmu region Documentation says the last register is at 0x184 (CAxCPUCMCR), so use proper length. Current APMU code accesses CAxCPUnCR which is currently outside of the remapped area. Signed-off-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7791.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 7e49e0a52e32..de1d92dc1323 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -27,7 +27,7 @@ static struct rcar_apmu_config r8a7791_apmu_config[] = { { - .iomem = DEFINE_RES_MEM(0xe6152000, 0x88), + .iomem = DEFINE_RES_MEM(0xe6152000, 0x188), .cpus = { 0, 1 }, } }; -- cgit 1.4.1 From e7cdf791dbc456329703424822e85eeb31fc1a54 Mon Sep 17 00:00:00 2001 From: Niklas Söderlund Date: Tue, 17 Feb 2015 14:31:54 +0100 Subject: ARM: shmobile: emev2 dtsi: Add PFC information MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With this information all GPIOs can make use of the PFC functionality. Signed-off-by: Niklas Söderlund Acked-by: Laurent Pinchart Acked-by: Linus Walleij Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/emev2.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi index cc7bfe0ba40a..bb45694d91bc 100644 --- a/arch/arm/boot/dts/emev2.dtsi +++ b/arch/arm/boot/dts/emev2.dtsi @@ -169,12 +169,18 @@ clock-names = "sclk"; }; + pfc: pfc@e0140200 { + compatible = "renesas,pfc-emev2"; + reg = <0xe0140200 0x100>; + }; + gpio0: gpio@e0050000 { compatible = "renesas,em-gio"; reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>, <0 68 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; + gpio-ranges = <&pfc 0 0 32>; #gpio-cells = <2>; ngpios = <32>; interrupt-controller; @@ -186,6 +192,7 @@ interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>, <0 70 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; + gpio-ranges = <&pfc 0 32 32>; #gpio-cells = <2>; ngpios = <32>; interrupt-controller; @@ -197,6 +204,7 @@ interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, <0 72 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; + gpio-ranges = <&pfc 0 64 32>; #gpio-cells = <2>; ngpios = <32>; interrupt-controller; @@ -208,6 +216,7 @@ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, <0 74 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; + gpio-ranges = <&pfc 0 96 32>; #gpio-cells = <2>; ngpios = <32>; interrupt-controller; @@ -219,6 +228,7 @@ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>, <0 76 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; + gpio-ranges = <&pfc 0 128 31>; #gpio-cells = <2>; ngpios = <31>; interrupt-controller; -- cgit 1.4.1 From 4a5fcc685a84751bbec5653e942fb3d61470a66c Mon Sep 17 00:00:00 2001 From: Niklas Söderlund Date: Tue, 17 Feb 2015 14:31:55 +0100 Subject: ARM: shmobile: emev2-kzm9d dts: Add PFC information for uart1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Configure the pinmux on kzm9d to use the serial connector for uart1. Signed-off-by: Niklas Söderlund Acked-by: Linus Walleij Acked-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/emev2-kzm9d.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts index 667d323e80a3..19446273e4a7 100644 --- a/arch/arm/boot/dts/emev2-kzm9d.dts +++ b/arch/arm/boot/dts/emev2-kzm9d.dts @@ -94,3 +94,16 @@ vdd33a-supply = <®_3p3v>; }; }; + +&pfc { + uart1_pins: uart@e1030000 { + renesas,groups = "uart1_ctrl", "uart1_data"; + renesas,function = "uart1"; + }; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; -- cgit 1.4.1 From 41650f406cdc4a420d5c08e1b407f6420323a04b Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 6 Jan 2015 00:33:25 +0300 Subject: ARM: shmobile: r8a7790: add CAN clocks The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree, along with the USB_EXTAL clock from which clkp2 is derived. Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 22 ++++++++++++++++++++-- include/dt-bindings/clock/r8a7790-clock.h | 1 + 2 files changed, 21 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 24de994443e1..e872854b4ba9 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -838,16 +838,34 @@ clock-output-names = "audio_clk_c"; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + clock-output-names = "usb_extal"; + }; + + /* External CAN clock */ + can_clk: can_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + clock-output-names = "can_clk"; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7790-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", - "z"; + "z", "rcan"; }; /* Variable factor clocks */ diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 91940271cf83..ffa8c11be68a 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -21,6 +21,7 @@ #define R8A7790_CLK_SD0 7 #define R8A7790_CLK_SD1 8 #define R8A7790_CLK_Z 9 +#define R8A7790_CLK_RCAN 10 /* MSTP0 */ #define R8A7790_CLK_MSIOF0 0 -- cgit 1.4.1 From 6a7742b4eea5de4af68bb62c20ca56e38b8e5b8b Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 6 Jan 2015 00:34:42 +0300 Subject: ARM: shmobile: r8a7790: add CAN DT support Define the generic R8A7790 parts of the CAN0/1 device nodes. Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index e872854b4ba9..cd7fc05f5e99 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -792,6 +792,26 @@ }; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7790"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, + <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7790"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, + <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>; -- cgit 1.4.1 From b324252cc18d52d5752942a8574c22229153c58f Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 6 Jan 2015 01:24:08 +0300 Subject: ARM: shmobile: r8a7791: add CAN clocks The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree, along with the USB_EXTAL clock from which clkp2 is derived. Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 23 +++++++++++++++++++++-- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 22 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index afba8af1a5e4..1ebffef5b908 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -862,15 +862,34 @@ status = "disabled"; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + clock-output-names = "usb_extal"; + }; + + /* External CAN clock */ + can_clk: can_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + clock-output-names = "can_clk"; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7791-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", - "lb", "qspi", "sdh", "sd0", "z"; + "lb", "qspi", "sdh", "sd0", "z", + "rcan"; }; /* Variable factor clocks */ diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index f096f3f6c16a..a45a36307895 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -20,6 +20,7 @@ #define R8A7791_CLK_SDH 6 #define R8A7791_CLK_SD0 7 #define R8A7791_CLK_Z 8 +#define R8A7791_CLK_RCAN 9 /* MSTP0 */ #define R8A7791_CLK_MSIOF0 0 -- cgit 1.4.1 From 3cf0188461def8f732fefce3975cab0189220574 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 6 Jan 2015 01:25:25 +0300 Subject: ARM: shmobile: r8a7791: add CAN DT support Define the generic R8A7791 parts of the CAN0/1 device nodes. Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 1ebffef5b908..ff49b95df0ec 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -816,6 +816,26 @@ }; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7791"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, + <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7791"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7791_CLK_RCAN1>, + <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>; -- cgit 1.4.1 From 457acc4a6ce8fe821aed4f254e72a76c88673712 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 6 Jan 2015 01:26:45 +0300 Subject: ARM: shmobile: henninger: add CAN0 DT support Define the Henninger board dependent part of the CAN0 device node. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-henninger.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts index d2ebf11f9881..e33e4047b0b0 100644 --- a/arch/arm/boot/dts/r8a7791-henninger.dts +++ b/arch/arm/boot/dts/r8a7791-henninger.dts @@ -141,6 +141,11 @@ renesas,groups = "vin0_data8", "vin0_clk"; renesas,function = "vin0"; }; + + can0_pins: can0 { + renesas,groups = "can0_data"; + renesas,function = "can0"; + }; }; &scif0 { @@ -307,3 +312,9 @@ }; }; }; + +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; -- cgit 1.4.1 From ae65a8ae4c25c7ea01204c9d033cd47da3000cf8 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 30 Dec 2014 23:20:34 +0300 Subject: ARM: shmobile: r8a7791: add ADSP clocks Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree. Based on the original patch by Konstantin Kozhevnikov . Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 11 +++++++---- include/dt-bindings/clock/r8a7791-clock.h | 2 ++ 2 files changed, 9 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index ff49b95df0ec..1e593a2b55fa 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -909,7 +909,7 @@ #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "z", - "rcan"; + "rcan", "adsp"; }; /* Variable factor clocks */ @@ -1164,13 +1164,16 @@ mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>, + <&extal_clk>, <&p_clk>; #clock-cells = <1>; clock-indices = < R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 - R8A7791_CLK_THERMAL R8A7791_CLK_PWM + R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL + R8A7791_CLK_PWM >; - clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; + clock-output-names = "audmac0", "audmac1", "adsp_mod", + "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index a45a36307895..8fc5dc8faeea 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -21,6 +21,7 @@ #define R8A7791_CLK_SD0 7 #define R8A7791_CLK_Z 8 #define R8A7791_CLK_RCAN 9 +#define R8A7791_CLK_ADSP 10 /* MSTP0 */ #define R8A7791_CLK_MSIOF0 0 @@ -72,6 +73,7 @@ /* MSTP5 */ #define R8A7791_CLK_AUDIO_DMAC1 1 #define R8A7791_CLK_AUDIO_DMAC0 2 +#define R8A7791_CLK_ADSP_MOD 6 #define R8A7791_CLK_THERMAL 22 #define R8A7791_CLK_PWM 23 -- cgit 1.4.1 From 3453ca9e4f51a0e6865d303f4e428cb6f630594f Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 30 Dec 2014 23:21:45 +0300 Subject: ARM: shmobile: r8a7790: add ADSP clocks Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7790 device tree. Based on the original patch by Konstantin Kozhevnikov . Signed-off-by: Sergei Shtylyov Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 11 +++++++---- include/dt-bindings/clock/r8a7790-clock.h | 2 ++ 2 files changed, 9 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index cd7fc05f5e99..c6c0a0c8f1be 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -885,7 +885,7 @@ #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", - "z", "rcan"; + "z", "rcan", "adsp"; }; /* Variable factor clocks */ @@ -1159,13 +1159,16 @@ mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>, + <&extal_clk>, <&p_clk>; #clock-cells = <1>; clock-indices = < R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 - R8A7790_CLK_THERMAL R8A7790_CLK_PWM + R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL + R8A7790_CLK_PWM >; - clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; + clock-output-names = "audmac0", "audmac1", "adsp_mod", + "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index ffa8c11be68a..3f2c6b198d4a 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -22,6 +22,7 @@ #define R8A7790_CLK_SD1 8 #define R8A7790_CLK_Z 9 #define R8A7790_CLK_RCAN 10 +#define R8A7790_CLK_ADSP 11 /* MSTP0 */ #define R8A7790_CLK_MSIOF0 0 @@ -81,6 +82,7 @@ /* MSTP5 */ #define R8A7790_CLK_AUDIO_DMAC1 1 #define R8A7790_CLK_AUDIO_DMAC0 2 +#define R8A7790_CLK_ADSP_MOD 6 #define R8A7790_CLK_THERMAL 22 #define R8A7790_CLK_PWM 23 -- cgit 1.4.1 From a76809a329d6ebae6cdf995670cc770304e265c0 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Tue, 20 Jan 2015 13:51:39 +0100 Subject: ARM: shmobile: r8a73a4: Common clock framework DT description Declares all r8a73a4 clocks supported by the legacy clock framework. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4.dtsi | 294 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 294 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 38136d9f6d95..a1adfe4bc760 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -9,6 +9,7 @@ * kind, whether express or implied. */ +#include #include #include @@ -377,4 +378,297 @@ <0 0xf1006000 0 0x2000>; interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + + clocks { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* External root clocks */ + extalr_clk: extalr_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "extalr"; + }; + extal1_clk: extal1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "extal1"; + }; + extal2_clk: extal2_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + clock-output-names = "extal2"; + }; + fsiack_clk: fsiack_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + clock-output-names = "fsiack"; + }; + fsibck_clk: fsibck_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + clock-output-names = "fsibck"; + }; + + /* Special CPG clocks */ + cpg_clocks: cpg_clocks@e6150000 { + compatible = "renesas,r8a73a4-cpg-clocks"; + reg = <0 0xe6150000 0 0x10000>; + clocks = <&extal1_clk>, <&extal2_clk>; + #clock-cells = <1>; + clock-output-names = "main", "pll0", "pll1", "pll2", + "pll2s", "pll2h", "z", "z2", + "i", "m3", "b", "m1", "m2", + "zx", "zs", "hp"; + }; + + /* Variable factor clocks (DIV6) */ + zb_clk: zb_clk@e6150010 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150010 0 4>; + clocks = <&pll1_div2_clk>, <0>, + <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>; + #clock-cells = <0>; + clock-output-names = "zb"; + }; + sdhi0_clk: sdhi0_clk@e6150074 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150074 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "sdhi0ck"; + }; + sdhi1_clk: sdhi1_clk@e6150078 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150078 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "sdhi1ck"; + }; + sdhi2_clk: sdhi2_clk@e615007c { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe615007c 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "sdhi2ck"; + }; + mmc0_clk: mmc0_clk@e6150240 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150240 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "mmc0"; + }; + mmc1_clk: mmc1_clk@e6150244 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150244 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "mmc1"; + }; + vclk1_clk: vclk1_clk@e6150008 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150008 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "vclk1"; + }; + vclk2_clk: vclk2_clk@e615000c { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe615000c 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "vclk2"; + }; + vclk3_clk: vclk3_clk@e615001c { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe615001c 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "vclk3"; + }; + vclk4_clk: vclk4_clk@e6150014 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150014 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "vclk4"; + }; + vclk5_clk: vclk5_clk@e6150034 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150034 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <0>, <&extal2_clk>, <&main_div2_clk>, + <&extalr_clk>, <0>, <0>; + #clock-cells = <0>; + clock-output-names = "vclk5"; + }; + fsia_clk: fsia_clk@e6150018 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150018 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <&fsiack_clk>, <0>; + #clock-cells = <0>; + clock-output-names = "fsia"; + }; + fsib_clk: fsib_clk@e6150090 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150090 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <&fsibck_clk>, <0>; + #clock-cells = <0>; + clock-output-names = "fsib"; + }; + mp_clk: mp_clk@e6150080 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150080 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <&extal2_clk>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "mp"; + }; + m4_clk: m4_clk@e6150098 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150098 0 4>; + clocks = <&cpg_clocks R8A73A4_CLK_PLL2S>; + #clock-cells = <0>; + clock-output-names = "m4"; + }; + hsi_clk: hsi_clk@e615026c { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe615026c 0 4>; + clocks = <&cpg_clocks R8A73A4_CLK_PLL2H>, <&pll1_div2_clk>, + <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>; + #clock-cells = <0>; + clock-output-names = "hsi"; + }; + spuv_clk: spuv_clk@e6150094 { + compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150094 0 4>; + clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>, + <&extal2_clk>, <&extal2_clk>; + #clock-cells = <0>; + clock-output-names = "spuv"; + }; + + /* Fixed factor clocks */ + main_div2_clk: main_div2_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A73A4_CLK_MAIN>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + clock-output-names = "main_div2"; + }; + pll0_div2_clk: pll0_div2_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A73A4_CLK_PLL0>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + clock-output-names = "pll0_div2"; + }; + pll1_div2_clk: pll1_div2_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A73A4_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + clock-output-names = "pll1_div2"; + }; + extal1_div2_clk: extal1_div2_clk { + compatible = "fixed-factor-clock"; + clocks = <&extal1_clk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + clock-output-names = "extal1_div2"; + }; + + /* Gate clocks */ + mstp2_clks: mstp2_clks@e6150138 { + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; + clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, + <&mp_clk>, <&mp_clk>, <&cpg_clocks R8A73A4_CLK_HP>; + #clock-cells = <1>; + clock-indices = < + R8A73A4_CLK_SCIFA0 R8A73A4_CLK_SCIFA1 + R8A73A4_CLK_SCIFB0 R8A73A4_CLK_SCIFB1 + R8A73A4_CLK_SCIFB2 R8A73A4_CLK_SCIFB3 + R8A73A4_CLK_DMAC + >; + clock-output-names = + "scifa0", "scifa1", "scifb0", "scifb1", + "scifb2", "scifb3", "dmac"; + }; + mstp3_clks: mstp3_clks@e615013c { + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; + clocks = <&cpg_clocks R8A73A4_CLK_HP>, <&mmc1_clk>, + <&sdhi2_clk>, <&sdhi1_clk>, <&sdhi0_clk>, + <&mmc0_clk>, <&cpg_clocks R8A73A4_CLK_HP>, + <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks + R8A73A4_CLK_HP>, <&cpg_clocks + R8A73A4_CLK_HP>, <&extalr_clk>; + #clock-cells = <1>; + clock-indices = < + R8A73A4_CLK_IIC2 R8A73A4_CLK_MMCIF1 + R8A73A4_CLK_SDHI2 R8A73A4_CLK_SDHI1 + R8A73A4_CLK_SDHI0 R8A73A4_CLK_MMCIF0 + R8A73A4_CLK_IIC6 R8A73A4_CLK_IIC7 + R8A73A4_CLK_IIC0 R8A73A4_CLK_IIC1 + R8A73A4_CLK_CMT1 + >; + clock-output-names = + "iic2", "mmcif1", "sdhi2", "sdhi1", "sdhi0", + "mmcif0", "iic6", "iic7", "iic0", "iic1", + "cmt1"; + }; + mstp4_clks: mstp4_clks@e6150140 { + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; + clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_HP>, + <&cpg_clocks R8A73A4_CLK_HP>; + #clock-cells = <1>; + clock-indices = < + R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4 + R8A73A4_CLK_IIC3 + >; + clock-output-names = + "iic5", "iic4", "iic3"; + }; + mstp5_clks: mstp5_clks@e6150144 { + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; + clocks = <&extal2_clk>, <&cpg_clocks R8A73A4_CLK_HP>; + #clock-cells = <1>; + clock-indices = < + R8A73A4_CLK_THERMAL R8A73A4_CLK_IIC8 + >; + clock-output-names = + "thermal", "iic8"; + }; + }; }; -- cgit 1.4.1 From ccc83dce9d4ebdfc5a74045c5a00518f08884313 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Tue, 20 Jan 2015 13:51:40 +0100 Subject: ARM: shmobile: ape6evm: Disable legacy clock initialization Disables r8a73a4_clock_init() if CCF is enabled. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-ape6evm-reference.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c index 3b68370b03a0..dd5bc63aba42 100644 --- a/arch/arm/mach-shmobile/board-ape6evm-reference.c +++ b/arch/arm/mach-shmobile/board-ape6evm-reference.c @@ -29,7 +29,7 @@ static void __init ape6evm_add_standard_devices(void) { - +#ifndef CONFIG_COMMON_CLK struct clk *parent; struct clk *mp; @@ -43,6 +43,7 @@ static void __init ape6evm_add_standard_devices(void) clk_set_parent(mp, parent); clk_put(parent); clk_put(mp); +#endif of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -- cgit 1.4.1 From 662dd64ff0691a0f2ab103448295df05dc026d5d Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Tue, 20 Jan 2015 13:51:41 +0100 Subject: ARM: shmobile: r8a73a4: Add MSTP clock assignments to DT Assigns clocks to dmac, i2c*, cmt1, thermal, scif*, sdhi*, and mmcif*. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index a1adfe4bc760..fdcca5d0fb61 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -88,6 +88,7 @@ "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19"; + clocks = <&mstp2_clks R8A73A4_CLK_DMAC>; }; }; @@ -120,6 +121,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x428>; interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IIC5>; status = "disabled"; }; @@ -128,6 +130,8 @@ compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2"; reg = <0 0xe6130000 0 0x1004>; interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_CMT1>; + clock-names = "fck"; renesas,channels-mask = <0xff>; @@ -211,6 +215,7 @@ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks R8A73A4_CLK_THERMAL>; }; i2c0: i2c@e6500000 { @@ -219,6 +224,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x428>; interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_IIC0>; status = "disabled"; }; @@ -228,6 +234,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x428>; interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_IIC1>; status = "disabled"; }; @@ -237,6 +244,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6520000 0 0x428>; interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_IIC2>; status = "disabled"; }; @@ -246,6 +254,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6530000 0 0x428>; interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IIC3>; status = "disabled"; }; @@ -255,6 +264,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6540000 0 0x428>; interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp4_clks R8A73A4_CLK_IIC4>; status = "disabled"; }; @@ -264,6 +274,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6550000 0 0x428>; interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_IIC6>; status = "disabled"; }; @@ -273,6 +284,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6560000 0 0x428>; interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_IIC7>; status = "disabled"; }; @@ -282,6 +294,7 @@ compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6570000 0 0x428>; interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp5_clks R8A73A4_CLK_IIC8>; status = "disabled"; }; @@ -289,6 +302,8 @@ compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6c20000 0 0x100>; interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A73A4_CLK_SCIFB0>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -296,6 +311,8 @@ compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6c30000 0 0x100>; interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A73A4_CLK_SCIFB1>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -303,6 +320,8 @@ compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; reg = <0 0xe6c40000 0 0x100>; interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A73A4_CLK_SCIFA0>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -310,6 +329,8 @@ compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; reg = <0 0xe6c50000 0 0x100>; interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A73A4_CLK_SCIFA1>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -317,6 +338,8 @@ compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6ce0000 0 0x100>; interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A73A4_CLK_SCIFB2>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -324,6 +347,8 @@ compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6cf0000 0 0x100>; interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A73A4_CLK_SCIFB3>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -331,6 +356,7 @@ compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee100000 0 0x100>; interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_SDHI0>; cap-sd-highspeed; status = "disabled"; }; @@ -339,6 +365,7 @@ compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee120000 0 0x100>; interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_SDHI1>; cap-sd-highspeed; status = "disabled"; }; @@ -347,6 +374,7 @@ compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee140000 0 0x100>; interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_SDHI2>; cap-sd-highspeed; status = "disabled"; }; @@ -355,6 +383,7 @@ compatible = "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>; reg-io-width = <4>; status = "disabled"; }; @@ -363,6 +392,7 @@ compatible = "renesas,sh-mmcif"; reg = <0 0xee220000 0 0x80>; interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>; reg-io-width = <4>; status = "disabled"; }; -- cgit 1.4.1 From 271b3ad26187fc7b47a74510b01193b506c60dbf Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 17 Feb 2015 16:04:41 +0100 Subject: ARM: shmobile: r8a73a4 dtsi: Add Bus State Controller node Add a node for the Bus State Controller (BSC) on r8a73a4, to which multiple external devices can be connected. The BSC is driven by the ZB clock, and located in PM domain C4. A reference to the latter will be added later. Signed-off-by: Geert Uytterhoeven Tested-by: Ulrich Hecht Acked-by: Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index fdcca5d0fb61..77bd35cd8911 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -409,6 +409,16 @@ interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + bsc: bus@fec10000 { + compatible = "renesas,bsc-r8a73a4", "renesas,bsc", + "simple-pm-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0x20000000>; + reg = <0 0xfec10000 0 0x400>; + clocks = <&zb_clk>; + }; + clocks { #address-cells = <2>; #size-cells = <2>; -- cgit 1.4.1 From a656c603889c256e3d05e79e57714aa88d179903 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 17 Feb 2015 16:04:42 +0100 Subject: ARM: shmobile: ape6evm dts: Move Ethernet node to BSC Move the Ethernet node from the ad-hoc lbsc node to the BSC node, as its connected to the Bus State Controller. This allows the system to know the right position of the Ethernet node in the clock and PM domain hierarchy, and manage the clock and PM domain appropriately. Signed-off-by: Geert Uytterhoeven Tested-by: Ulrich Hecht Acked-by: Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 35 +++++++++++++++-------------------- 1 file changed, 15 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index 0d50bef01234..44c4cac1820a 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -72,26 +72,6 @@ regulator-always-on; }; - lbsc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0x20000000>; - - ethernet@8000000 { - compatible = "smsc,lan9220", "smsc,lan9115"; - reg = <0x08000000 0x1000>; - interrupt-parent = <&irqc1>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; - phy-mode = "mii"; - reg-io-width = <4>; - smsc,irq-active-high; - smsc,irq-push-pull; - vdd33a-supply = <&ape6evm_fixed_3v3>; - vddvario-supply = <&ape6evm_fixed_1v8>; - }; - }; - leds { compatible = "gpio-leds"; led1 { @@ -184,6 +164,21 @@ voltage-tolerance = <1>; /* 1% */ }; +&bsc { + ethernet@8000000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x08000000 0x1000>; + interrupt-parent = <&irqc1>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + phy-mode = "mii"; + reg-io-width = <4>; + smsc,irq-active-high; + smsc,irq-push-pull; + vdd33a-supply = <&ape6evm_fixed_3v3>; + vddvario-supply = <&ape6evm_fixed_1v8>; + }; +}; + &cmt1 { status = "okay"; }; -- cgit 1.4.1 From e4ba0a9bddff3ba52cec100414d2f178440efc91 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 17 Feb 2015 16:04:43 +0100 Subject: ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bug Currently the pin function controller (which is also a GPIO controller) is instantiated before the interrupt controllers due to the order in the DTS. At that time, the irq domains for the interrupt controllers referenced by its interrupts-extended property cannot be found yet: irq: no irq domain found for /interrupt-controller@e61c0000 ! Nevertheless, the core OF probing code ignores this failure, besides a debug message that's not normally printed: not all legacy IRQ resources mapped for pfc and continues initialization of the device. Then, the sh-pfc driver cannot find any IRQ resources, and thinks no interrupts are available, causing gpio-keys to fail later: gpio-keys keyboard: Unable to claim irq 0; error -22 gpio-keys: probe of keyboard failed with error -22 Move the pin function controller node after the interrupt controller nodes it references to work around the bug in the core OF probing code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4.dtsi | 46 +++++++++++++++++++++--------------------- 1 file changed, 23 insertions(+), 23 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 77bd35cd8911..d41201d258ca 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -92,29 +92,6 @@ }; }; - pfc: pfc@e6050000 { - compatible = "renesas,pfc-r8a73a4"; - reg = <0 0xe6050000 0 0x9000>; - gpio-controller; - #gpio-cells = <2>; - interrupts-extended = - <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>, - <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>, - <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>, - <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>, - <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>, - <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>, - <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>, - <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>, - <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>, - <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>, - <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>, - <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>, - <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>, - <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>, - <&irqc1 24 0>, <&irqc1 25 0>; - }; - i2c5: i2c@e60b0000 { #address-cells = <1>; #size-cells = <0>; @@ -210,6 +187,29 @@ <0 57 IRQ_TYPE_LEVEL_HIGH>; }; + pfc: pfc@e6050000 { + compatible = "renesas,pfc-r8a73a4"; + reg = <0 0xe6050000 0 0x9000>; + gpio-controller; + #gpio-cells = <2>; + interrupts-extended = + <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>, + <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>, + <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>, + <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>, + <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>, + <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>, + <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>, + <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>, + <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>, + <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>, + <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>, + <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>, + <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>, + <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>, + <&irqc1 24 0>, <&irqc1 25 0>; + }; + thermal@e61f0000 { compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, -- cgit 1.4.1 From 8ba1f188d605a1b3dca8073d43e9dfba654775b2 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Tue, 17 Feb 2015 16:04:44 +0100 Subject: ARM: shmobile: ape6evm-reference: Remove board C code and DT file Now that the r8a73a4 generic multiplatform case has the same features as the APE6EVM DT reference board code, we get rid of the latter. DT reference code in the future shall make use of the r8a73a4 multiplatform support code with the generic SoC machine vector. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart [geert: Update Documentation/devicetree/bindings/arm/shmobile.txt] Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 - arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 156 --------------------- arch/arm/mach-shmobile/Kconfig | 12 -- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/Makefile.boot | 1 - arch/arm/mach-shmobile/board-ape6evm-reference.c | 61 -------- 7 files changed, 234 deletions(-) delete mode 100644 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts delete mode 100644 arch/arm/mach-shmobile/board-ape6evm-reference.c (limited to 'arch') diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 51147cb5c036..18a8591b5c39 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -37,8 +37,6 @@ Boards: compatible = "renesas,alt", "renesas,r8a7794" - APE6-EVM compatible = "renesas,ape6evm", "renesas,r8a73a4" - - APE6-EVM - Reference Device Tree Implementation - compatible = "renesas,ape6evm-reference", "renesas,r8a73a4" - Atmark Techno Armadillo-800 EVA compatible = "renesas,armadillo800eva" - BOCK-W diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a1c776b8dcec..d3e6cf3c3d03 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -465,7 +465,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ r8a73a4-ape6evm.dtb \ - r8a73a4-ape6evm-reference.dtb \ r8a7740-armadillo800eva.dtb \ r8a7778-bockw.dtb \ r8a7778-bockw-reference.dtb \ diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts deleted file mode 100644 index b3d8f844b57a..000000000000 --- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Device Tree Source for the APE6EVM board - * - * Copyright (C) 2013 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; -#include "r8a73a4.dtsi" -#include - -/ { - model = "APE6EVM"; - compatible = "renesas,ape6evm-reference", "renesas,r8a73a4"; - - aliases { - serial0 = &scifa0; - }; - - chosen { - bootargs = "ignore_loglevel rw"; - stdout-path = &scifa0; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - memory@200000000 { - device_type = "memory"; - reg = <2 0x00000000 0 0x40000000>; - }; - - vcc_mmc0: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "MMC0 Vcc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - vcc_sdhi0: regulator@1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&pfc 76 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - /* Common 3.3V rail, used by several devices on APE6EVM */ - ape6evm_fixed_3v3: regulator@2 { - compatible = "regulator-fixed"; - regulator-name = "3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - lbsc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0x20000000>; - }; -}; - -&i2c5 { - status = "okay"; - vdd_dvfs: max8973@1b { - compatible = "maxim,max8973"; - reg = <0x1b>; - - regulator-min-microvolt = <935000>; - regulator-max-microvolt = <1200000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&cpu0 { - cpu0-supply = <&vdd_dvfs>; - operating-points = < - /* kHz uV */ - 1950000 1115000 - 1462500 995000 - >; - voltage-tolerance = <1>; /* 1% */ -}; - -&cmt1 { - status = "okay"; -}; - -&pfc { - scifa0_pins: serial0 { - renesas,groups = "scifa0_data"; - renesas,function = "scifa0"; - }; - - mmc0_pins: mmc { - renesas,groups = "mmc0_data8", "mmc0_ctrl"; - renesas,function = "mmc0"; - }; - - sdhi0_pins: sd0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; - renesas,function = "sdhi0"; - }; - - sdhi1_pins: sd1 { - renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; - renesas,function = "sdhi1"; - }; -}; - -&mmcif0 { - vmmc-supply = <&vcc_mmc0>; - bus-width = <8>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - status = "okay"; -}; - -&scifa0 { - pinctrl-0 = <&scifa0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&sdhi0 { - vmmc-supply = <&vcc_sdhi0>; - bus-width = <4>; - toshiba,mmc-wrprotect-disable; - pinctrl-names = "default"; - pinctrl-0 = <&sdhi0_pins>; - status = "okay"; -}; - -&sdhi1 { - vmmc-supply = <&ape6evm_fixed_3v3>; - bus-width = <4>; - broken-cd; - toshiba,mmc-wrprotect-disable; - pinctrl-names = "default"; - pinctrl-0 = <&sdhi1_pins>; - status = "okay"; -}; diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 2f36c85eec4b..f8977e74622c 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -142,18 +142,6 @@ config MACH_APE6EVM select SMSC_PHY if SMSC911X select USE_OF -config MACH_APE6EVM_REFERENCE - bool "APE6EVM board - Reference Device Tree Implementation" - depends on ARCH_R8A73A4 - select SMSC_PHY if SMSC911X - select USE_OF - ---help--- - Use reference implementation of APE6EVM board support - which makes a greater use of device tree at the expense - of not supporting a number of devices. - - This is intended to aid developers - config MACH_MACKEREL bool "mackerel board" depends on ARCH_SH7372 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index d53996e6da97..40f82ee2b974 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -59,7 +59,6 @@ ifdef CONFIG_ARCH_SHMOBILE_MULTI obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o else obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o -obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o obj-$(CONFIG_MACH_BOCKW) += board-bockw.o obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot index 02532bea5300..e67a6c94fe91 100644 --- a/arch/arm/mach-shmobile/Makefile.boot +++ b/arch/arm/mach-shmobile/Makefile.boot @@ -1,7 +1,6 @@ # per-board load address for uImage loadaddr-y := loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000 -loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000 loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000 loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000 diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c deleted file mode 100644 index dd5bc63aba42..000000000000 --- a/arch/arm/mach-shmobile/board-ape6evm-reference.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * APE6EVM board support - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "common.h" -#include "r8a73a4.h" - -static void __init ape6evm_add_standard_devices(void) -{ -#ifndef CONFIG_COMMON_CLK - struct clk *parent; - struct clk *mp; - - r8a73a4_clock_init(); - - /* MP clock parent = extal2 */ - parent = clk_get(NULL, "extal2"); - mp = clk_get(NULL, "mp"); - BUG_ON(IS_ERR(parent) || IS_ERR(mp)); - - clk_set_parent(mp, parent); - clk_put(parent); - clk_put(mp); -#endif - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static const char *ape6evm_boards_compat_dt[] __initdata = { - "renesas,ape6evm-reference", - NULL, -}; - -DT_MACHINE_START(APE6EVM_DT, "ape6evm") - .init_early = shmobile_init_delay, - .init_machine = ape6evm_add_standard_devices, - .init_late = shmobile_init_late, - .dt_compat = ape6evm_boards_compat_dt, -MACHINE_END -- cgit 1.4.1 From 9d07d414d4c33d862fc41e22c473a662996b0f4e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 24 Feb 2015 06:38:14 +0900 Subject: ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform This removes the remains of the legacy ape6evm platform. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- MAINTAINERS | 1 - arch/arm/boot/dts/Makefile | 1 - arch/arm/configs/ape6evm_defconfig | 109 ------------ arch/arm/mach-shmobile/Kconfig | 13 -- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/Makefile.boot | 1 - arch/arm/mach-shmobile/board-ape6evm.c | 306 --------------------------------- 7 files changed, 432 deletions(-) delete mode 100644 arch/arm/configs/ape6evm_defconfig delete mode 100644 arch/arm/mach-shmobile/board-ape6evm.c (limited to 'arch') diff --git a/MAINTAINERS b/MAINTAINERS index ddc5a8cf9a8a..5181e7a8d803 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1414,7 +1414,6 @@ F: arch/arm/boot/dts/emev2* F: arch/arm/boot/dts/r7s* F: arch/arm/boot/dts/r8a* F: arch/arm/boot/dts/sh* -F: arch/arm/configs/ape6evm_defconfig F: arch/arm/configs/armadillo800eva_defconfig F: arch/arm/configs/bockw_defconfig F: arch/arm/configs/kzm9g_defconfig diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d3e6cf3c3d03..3dbd553361c8 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -464,7 +464,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-smdkv210.dtb \ s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ - r8a73a4-ape6evm.dtb \ r8a7740-armadillo800eva.dtb \ r8a7778-bockw.dtb \ r8a7778-bockw-reference.dtb \ diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig deleted file mode 100644 index 9e9a72e3d30f..000000000000 --- a/arch/arm/configs/ape6evm_defconfig +++ /dev/null @@ -1,109 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CGROUPS=y -CONFIG_CGROUP_SCHED=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -CONFIG_PERF_EVENTS=y -CONFIG_SLAB=y -CONFIG_ARCH_SHMOBILE_LEGACY=y -CONFIG_ARCH_R8A73A4=y -CONFIG_MACH_APE6EVM=y -# CONFIG_ARM_THUMB is not set -CONFIG_CPU_BPREDICT_DISABLE=y -CONFIG_PL310_ERRATA_588369=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_SMP=y -CONFIG_SCHED_MC=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_NR_CPUS=8 -CONFIG_AEABI=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -# CONFIG_HW_PERF_EVENTS is not set -# CONFIG_COMPACTION is not set -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_ARM_APPENDED_DTB=y -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_BINFMT_MISC=y -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_LRO is not set -# CONFIG_IPV6_SIT is not set -CONFIG_NETFILTER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_FW_LOADER_USER_HELPER is not set -CONFIG_NETDEVICES=y -# CONFIG_NET_CADENCE is not set -CONFIG_SMC91X=y -CONFIG_SMSC911X=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -CONFIG_SERIAL_NONSTANDARD=y -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=12 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -CONFIG_I2C=y -CONFIG_I2C_SH_MOBILE=y -CONFIG_GPIO_SH_PFC=y -CONFIG_GPIOLIB=y -# CONFIG_HWMON is not set -CONFIG_THERMAL=y -CONFIG_RCAR_THERMAL=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_MAX8973=y -# CONFIG_HID is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_SDHI=y -CONFIG_MMC_SH_MMCIF=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_DMADEVICES=y -CONFIG_SH_DMAE=y -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_DNOTIFY is not set -CONFIG_TMPFS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_ROOT_NFS=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_ENABLE_DEFAULT_TRACERS=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_LIBCRC32C=y diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index f8977e74622c..5fc47569051e 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -108,13 +108,6 @@ config ARCH_SH73A0 select SH_INTC select RENESAS_INTC_IRQPIN -config ARCH_R8A73A4 - bool "R-Mobile APE6 (R8A73A40)" - select ARCH_RMOBILE - select ARCH_WANT_OPTIONAL_GPIOLIB - select ARM_GIC - select RENESAS_IRQC - config ARCH_R8A7740 bool "R-Mobile A1 (R8A77400)" select ARCH_RMOBILE @@ -136,12 +129,6 @@ config ARCH_R8A7779 comment "Renesas ARM SoCs Board Type" -config MACH_APE6EVM - bool "APE6EVM board" - depends on ARCH_R8A73A4 - select SMSC_PHY if SMSC911X - select USE_OF - config MACH_MACKEREL bool "mackerel board" depends on ARCH_SH7372 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 40f82ee2b974..963d98553145 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -58,7 +58,6 @@ obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o ifdef CONFIG_ARCH_SHMOBILE_MULTI obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o else -obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o obj-$(CONFIG_MACH_BOCKW) += board-bockw.o obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot index e67a6c94fe91..d893aa467781 100644 --- a/arch/arm/mach-shmobile/Makefile.boot +++ b/arch/arm/mach-shmobile/Makefile.boot @@ -1,6 +1,5 @@ # per-board load address for uImage loadaddr-y := -loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000 loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000 loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000 diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c deleted file mode 100644 index 444f22d370f0..000000000000 --- a/arch/arm/mach-shmobile/board-ape6evm.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * APE6EVM board support - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "common.h" -#include "irqs.h" -#include "r8a73a4.h" - -/* LEDS */ -static struct gpio_led ape6evm_leds[] = { - { - .name = "gnss-en", - .gpio = 28, - .default_state = LEDS_GPIO_DEFSTATE_OFF, - }, { - .name = "nfc-nrst", - .gpio = 126, - .default_state = LEDS_GPIO_DEFSTATE_OFF, - }, { - .name = "gnss-nrst", - .gpio = 132, - .default_state = LEDS_GPIO_DEFSTATE_OFF, - }, { - .name = "bt-wakeup", - .gpio = 232, - .default_state = LEDS_GPIO_DEFSTATE_OFF, - }, { - .name = "strobe", - .gpio = 250, - .default_state = LEDS_GPIO_DEFSTATE_OFF, - }, { - .name = "bbresetout", - .gpio = 288, - .default_state = LEDS_GPIO_DEFSTATE_OFF, - }, -}; - -static __initdata struct gpio_led_platform_data ape6evm_leds_pdata = { - .leds = ape6evm_leds, - .num_leds = ARRAY_SIZE(ape6evm_leds), -}; - -/* GPIO KEY */ -#define GPIO_KEY(c, g, d, ...) \ - { .code = c, .gpio = g, .desc = d, .active_low = 1 } - -static struct gpio_keys_button gpio_buttons[] = { - GPIO_KEY(KEY_0, 324, "S16"), - GPIO_KEY(KEY_MENU, 325, "S17"), - GPIO_KEY(KEY_HOME, 326, "S18"), - GPIO_KEY(KEY_BACK, 327, "S19"), - GPIO_KEY(KEY_VOLUMEUP, 328, "S20"), - GPIO_KEY(KEY_VOLUMEDOWN, 329, "S21"), -}; - -static struct gpio_keys_platform_data ape6evm_keys_pdata __initdata = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -/* Dummy supplies, where voltage doesn't matter */ -static struct regulator_consumer_supply dummy_supplies[] = { - REGULATOR_SUPPLY("vddvario", "smsc911x"), - REGULATOR_SUPPLY("vdd33a", "smsc911x"), -}; - -/* SMSC LAN9220 */ -static const struct resource lan9220_res[] __initconst = { - DEFINE_RES_MEM(0x08000000, 0x1000), - { - .start = irq_pin(40), /* IRQ40 */ - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, - }, -}; - -static const struct smsc911x_platform_config lan9220_data __initconst = { - .flags = SMSC911X_USE_32BIT, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, -}; - -/* - * MMC0 power supplies: - * Both Vcc and VccQ to eMMC on APE6EVM are supplied by a tps80032 voltage - * regulator. Until support for it is added to this file we simulate the - * Vcc supply by a fixed always-on regulator - */ -static struct regulator_consumer_supply vcc_mmc0_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), -}; - -/* - * SDHI0 power supplies: - * Vcc to SDHI0 on APE6EVM is supplied by a GPIO-switchable regulator. VccQ is - * provided by the same tps80032 regulator as both MMC0 voltages - see comment - * above - */ -static struct regulator_consumer_supply vcc_sdhi0_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), -}; - -static struct regulator_init_data vcc_sdhi0_init_data = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(vcc_sdhi0_consumers), - .consumer_supplies = vcc_sdhi0_consumers, -}; - -static const struct fixed_voltage_config vcc_sdhi0_info __initconst = { - .supply_name = "SDHI0 Vcc", - .microvolts = 3300000, - .gpio = 76, - .enable_high = 1, - .init_data = &vcc_sdhi0_init_data, -}; - -/* - * SDHI1 power supplies: - * Vcc and VccQ to SDHI1 on APE6EVM are both fixed at 3.3V - */ -static struct regulator_consumer_supply vcc_sdhi1_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), -}; - -/* MMCIF */ -static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = { - .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, - .slave_id_tx = SHDMA_SLAVE_MMCIF0_TX, - .slave_id_rx = SHDMA_SLAVE_MMCIF0_RX, - .ccs_unsupported = true, -}; - -static const struct resource mmcif0_resources[] __initconst = { - DEFINE_RES_MEM(0xee200000, 0x100), - DEFINE_RES_IRQ(gic_spi(169)), -}; - -/* SDHI0 */ -static const struct sh_mobile_sdhi_info sdhi0_pdata __initconst = { - .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, - .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, -}; - -static const struct resource sdhi0_resources[] __initconst = { - DEFINE_RES_MEM(0xee100000, 0x100), - DEFINE_RES_IRQ(gic_spi(165)), -}; - -/* SDHI1 */ -static const struct sh_mobile_sdhi_info sdhi1_pdata __initconst = { - .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, - .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | - MMC_CAP_NEEDS_POLL, -}; - -static const struct resource sdhi1_resources[] __initconst = { - DEFINE_RES_MEM(0xee120000, 0x100), - DEFINE_RES_IRQ(gic_spi(166)), -}; - -static const struct pinctrl_map ape6evm_pinctrl_map[] __initconst = { - /* SCIFA0 console */ - PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4", - "scifa0_data", "scifa0"), - /* SMSC */ - PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a73a4", - "irqc_irq40", "irqc"), - /* MMCIF0 */ - PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4", - "mmc0_data8", "mmc0"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4", - "mmc0_ctrl", "mmc0"), - /* SDHI0: uSD: no WP */ - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4", - "sdhi0_data4", "sdhi0"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4", - "sdhi0_ctrl", "sdhi0"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4", - "sdhi0_cd", "sdhi0"), - /* SDHI1 */ - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a73a4", - "sdhi1_data4", "sdhi1"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a73a4", - "sdhi1_ctrl", "sdhi1"), -}; - -static void __init ape6evm_add_standard_devices(void) -{ - - struct clk *parent; - struct clk *mp; - - r8a73a4_clock_init(); - - /* MP clock parent = extal2 */ - parent = clk_get(NULL, "extal2"); - mp = clk_get(NULL, "mp"); - BUG_ON(IS_ERR(parent) || IS_ERR(mp)); - - clk_set_parent(mp, parent); - clk_put(parent); - clk_put(mp); - - pinctrl_register_mappings(ape6evm_pinctrl_map, - ARRAY_SIZE(ape6evm_pinctrl_map)); - r8a73a4_pinmux_init(); - r8a73a4_add_standard_devices(); - - /* LAN9220 ethernet */ - gpio_request_one(270, GPIOF_OUT_INIT_HIGH, NULL); /* smsc9220 RESET */ - - regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - - platform_device_register_resndata(NULL, "smsc911x", -1, - lan9220_res, ARRAY_SIZE(lan9220_res), - &lan9220_data, sizeof(lan9220_data)); - - regulator_register_always_on(1, "MMC0 Vcc", vcc_mmc0_consumers, - ARRAY_SIZE(vcc_mmc0_consumers), 2800000); - platform_device_register_resndata(NULL, "sh_mmcif", 0, - mmcif0_resources, ARRAY_SIZE(mmcif0_resources), - &mmcif0_pdata, sizeof(mmcif0_pdata)); - platform_device_register_data(NULL, "reg-fixed-voltage", 2, - &vcc_sdhi0_info, sizeof(vcc_sdhi0_info)); - platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0, - sdhi0_resources, ARRAY_SIZE(sdhi0_resources), - &sdhi0_pdata, sizeof(sdhi0_pdata)); - regulator_register_always_on(3, "SDHI1 Vcc", vcc_sdhi1_consumers, - ARRAY_SIZE(vcc_sdhi1_consumers), 3300000); - platform_device_register_resndata(NULL, "sh_mobile_sdhi", 1, - sdhi1_resources, ARRAY_SIZE(sdhi1_resources), - &sdhi1_pdata, sizeof(sdhi1_pdata)); - platform_device_register_data(NULL, "gpio-keys", -1, - &ape6evm_keys_pdata, - sizeof(ape6evm_keys_pdata)); - platform_device_register_data(NULL, "leds-gpio", -1, - &ape6evm_leds_pdata, - sizeof(ape6evm_leds_pdata)); -} - -static void __init ape6evm_legacy_init_time(void) -{ - /* Do not invoke DT-based timers via clocksource_of_init() */ -} - -static void __init ape6evm_legacy_init_irq(void) -{ - void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000); - void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000); - - gic_init(0, 29, gic_dist_base, gic_cpu_base); - - /* Do not invoke DT-based interrupt code via irqchip_init() */ -} - - -static const char *ape6evm_boards_compat_dt[] __initdata = { - "renesas,ape6evm", - NULL, -}; - -DT_MACHINE_START(APE6EVM_DT, "ape6evm") - .init_early = shmobile_init_delay, - .init_irq = ape6evm_legacy_init_irq, - .init_machine = ape6evm_add_standard_devices, - .init_late = shmobile_init_late, - .dt_compat = ape6evm_boards_compat_dt, - .init_time = ape6evm_legacy_init_time, -MACHINE_END -- cgit 1.4.1 From d1e21e3f57513c5ac09d722590f5ad6eee7ae1df Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 17 Feb 2015 16:04:46 +0100 Subject: ARM: shmobile: ape6evm dts: Drop console= bootargs parameter Since ("ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform"), ape6evm is restricted to booting from DT, so chosen/stdout-path is always used, and we can drop the "console=" parameter from chosen/bootargs. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index 44c4cac1820a..f9e81512201a 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw"; + bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw"; stdout-path = &scifa0; }; -- cgit 1.4.1 From 8c4892a633f08edbc54b6b59a673f76bd1cd7e94 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:45 +0100 Subject: ARM: shmobile: r8a7778: synchronize dts with reference platform This moves everything to the legacy dts that is missing there to make it suitable for use with multiplatform. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778-bockw.dts | 106 ++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index 46a884d45175..73472232fa3c 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -16,17 +16,123 @@ /dts-v1/; #include "r8a7778.dtsi" +#include +#include / { model = "bockw"; compatible = "renesas,bockw", "renesas,r8a7778"; + aliases { + serial0 = &scif0; + }; + chosen { bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw"; + stdout-path = &scif0; }; memory { device_type = "memory"; reg = <0x60000000 0x10000000>; }; + + fixedregulator3v3: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ethernet@18300000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x18300000 0x1000>; + + phy-mode = "mii"; + interrupt-parent = <&irqpin>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + reg-io-width = <4>; + vddvario-supply = <&fixedregulator3v3>; + vdd33a-supply = <&fixedregulator3v3>; + }; +}; + +&mmcif { + pinctrl-0 = <&mmc_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&fixedregulator3v3>; + bus-width = <8>; + broken-cd; + status = "okay"; +}; + +&irqpin { + status = "okay"; +}; + +&tmu0 { + status = "okay"; +}; + +&pfc { + scif0_pins: serial0 { + renesas,groups = "scif0_data_a", "scif0_ctrl"; + renesas,function = "scif0"; + }; + + mmc_pins: mmc { + renesas,groups = "mmc_data8", "mmc_ctrl"; + renesas,function = "mmc"; + }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl", + "sdhi0_cd"; + renesas,function = "sdhi0"; + }; + + hspi0_pins: hspi0 { + renesas,groups = "hspi0_a"; + renesas,function = "hspi0"; + }; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&fixedregulator3v3>; + bus-width = <4>; + status = "okay"; + wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; +}; + +&hspi0 { + pinctrl-0 = <&hspi0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl008k"; + reg = <0>; + spi-max-frequency = <104000000>; + m25p,fast-read; + + partition@0 { + label = "data(spi)"; + reg = <0x00000000 0x00100000>; + }; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; }; -- cgit 1.4.1 From 93aa970d2b0ce41efb7e5e6b94aaa66e8349a510 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:47 +0100 Subject: ARM: shmobile: r8a7778: Common clock framework DT description Declares all r8a7778 clocks supported by the legacy clock framework, plus tmu2. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven [horms: only included dtsi changes] Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 191 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 191 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index ef8533910029..822ba9003138 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -16,6 +16,7 @@ /include/ "skeleton.dtsi" +#include #include / { @@ -294,4 +295,194 @@ #size-cells = <0>; status = "disabled"; }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* External input clock */ + extal_clk: extal_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "extal"; + }; + + /* Special CPG clocks */ + cpg_clocks: cpg_clocks@ffc80000 { + compatible = "renesas,r8a7778-cpg-clocks"; + reg = <0xffc80000 0x80>; + #clock-cells = <1>; + clocks = <&extal_clk>; + clock-output-names = "plla", "pllb", "b", + "out", "p", "s", "s1"; + }; + + /* Audio clocks; frequencies are set by boards if applicable. */ + audio_clk_a: audio_clk_a { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "audio_clk_a"; + }; + audio_clk_b: audio_clk_b { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "audio_clk_b"; + }; + audio_clk_c: audio_clk_c { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "audio_clk_c"; + }; + + /* Fixed ratio clocks */ + g_clk: g_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7778_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <12>; + clock-mult = <1>; + clock-output-names = "g"; + }; + i_clk: i_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7778_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clock-output-names = "i"; + }; + s3_clk: s3_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7778_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <4>; + clock-mult = <1>; + clock-output-names = "s3"; + }; + s4_clk: s4_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7778_CLK_PLLA>; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clock-output-names = "s4"; + }; + z_clk: z_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7778_CLK_PLLB>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clock-output-names = "z"; + }; + + /* Gate clocks */ + mstp0_clks: mstp0_clks@ffc80030 { + compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xffc80030 4>; + clocks = <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_S>; + #clock-cells = <1>; + clock-indices = < + R8A7778_CLK_I2C0 R8A7778_CLK_I2C1 + R8A7778_CLK_I2C2 R8A7778_CLK_I2C3 + R8A7778_CLK_SCIF0 R8A7778_CLK_SCIF1 + R8A7778_CLK_SCIF2 R8A7778_CLK_SCIF3 + R8A7778_CLK_SCIF4 R8A7778_CLK_SCIF5 + R8A7778_CLK_TMU0 R8A7778_CLK_TMU1 + R8A7778_CLK_TMU2 R8A7778_CLK_SSI0 + R8A7778_CLK_SSI1 R8A7778_CLK_SSI2 + R8A7778_CLK_SSI3 R8A7778_CLK_SRU + R8A7778_CLK_HSPI + >; + clock-output-names = + "i2c0", "i2c1", "i2c2", "i2c3", "scif0", + "scif1", "scif2", "scif3", "scif4", "scif5", + "tmu0", "tmu1", "tmu2", "ssi0", "ssi1", + "ssi2", "ssi3", "sru", "hspi"; + }; + mstp1_clks: mstp1_clks@ffc80034 { + compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xffc80034 4>, <0xffc80044 4>; + clocks = <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_S>, + <&cpg_clocks R8A7778_CLK_S>, + <&cpg_clocks R8A7778_CLK_P>; + #clock-cells = <1>; + clock-indices = < + R8A7778_CLK_ETHER R8A7778_CLK_VIN0 + R8A7778_CLK_VIN1 R8A7778_CLK_USB + >; + clock-output-names = + "ether", "vin0", "vin1", "usb"; + }; + mstp3_clks: mstp3_clks@ffc8003c { + compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xffc8003c 4>; + clocks = <&s4_clk>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>; + #clock-cells = <1>; + clock-indices = < + R8A7778_CLK_MMC R8A7778_CLK_SDHI0 + R8A7778_CLK_SDHI1 R8A7778_CLK_SDHI2 + R8A7778_CLK_SSI4 R8A7778_CLK_SSI5 + R8A7778_CLK_SSI6 R8A7778_CLK_SSI7 + R8A7778_CLK_SSI8 + >; + clock-output-names = + "mmc", "sdhi0", "sdhi1", "sdhi2", "ssi4", + "ssi5", "ssi6", "ssi7", "ssi8"; + }; + mstp5_clks: mstp5_clks@ffc80054 { + compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xffc80054 4>; + clocks = <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>, + <&cpg_clocks R8A7778_CLK_P>; + #clock-cells = <1>; + clock-indices = < + R8A7778_CLK_SRU_SRC0 R8A7778_CLK_SRU_SRC1 + R8A7778_CLK_SRU_SRC2 R8A7778_CLK_SRU_SRC3 + R8A7778_CLK_SRU_SRC4 R8A7778_CLK_SRU_SRC5 + R8A7778_CLK_SRU_SRC6 R8A7778_CLK_SRU_SRC7 + R8A7778_CLK_SRU_SRC8 + >; + clock-output-names = + "sru-src0", "sru-src1", "sru-src2", + "sru-src3", "sru-src4", "sru-src5", + "sru-src6", "sru-src7", "sru-src8"; + }; + }; }; -- cgit 1.4.1 From 43cbec8577cfd66713416c3ad33a9856edcaffb9 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:49 +0100 Subject: ARM: shmobile: r8a7778: implement SoC and board CCF support Disables the legacy clock framework and passes the mode bits to the CPG driver if CCF is enabled. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-bockw-reference.c | 2 ++ arch/arm/mach-shmobile/setup-r8a7778.c | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c index d649ade4a202..9a74efda3d18 100644 --- a/arch/arm/mach-shmobile/board-bockw-reference.c +++ b/arch/arm/mach-shmobile/board-bockw-reference.c @@ -36,7 +36,9 @@ static void __init bockw_init(void) void __iomem *fpga; void __iomem *pfc; +#ifndef CONFIG_COMMON_CLK r8a7778_clock_init(); +#endif r8a7778_init_irq_extpin_dt(1); r8a7778_add_dt_devices(); diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index cef8895a9b82..c49aa094fe17 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -41,6 +42,21 @@ #include "irqs.h" #include "r8a7778.h" +#define MODEMR 0xffcc0020 + +#ifdef CONFIG_COMMON_CLK +static void __init r8a7778_timer_init(void) +{ + u32 mode; + void __iomem *modemr = ioremap_nocache(MODEMR, 4); + + BUG_ON(!modemr); + mode = ioread32(modemr); + iounmap(modemr); + r8a7778_clocks_init(mode); +} +#endif + /* SCIF */ #define R8A7778_SCIF(index, baseaddr, irq) \ static struct plat_sci_port scif##index##_platform_data = { \ @@ -608,6 +624,9 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") .init_early = shmobile_init_delay, .init_irq = r8a7778_init_irq_dt, .init_late = shmobile_init_late, +#ifdef CONFIG_COMMON_CLK + .init_time = r8a7778_timer_init, +#endif .dt_compat = r8a7778_compat_dt, MACHINE_END -- cgit 1.4.1 From 66462be7c6f986903702505e98f42230e22bf4c7 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:50 +0100 Subject: ARM: shmobile: r8a7778: add MSTP clock assignments to DT Assigns clocks to i2c*, tmu*, scif*, mmcif, sdhi*, and hspi*. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 822ba9003138..5c347e8d7ded 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -133,6 +133,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C0>; status = "disabled"; }; @@ -142,6 +143,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C1>; status = "disabled"; }; @@ -151,6 +153,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C2>; status = "disabled"; }; @@ -160,6 +163,7 @@ compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_I2C3>; status = "disabled"; }; @@ -169,6 +173,8 @@ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, <0 33 IRQ_TYPE_LEVEL_HIGH>, <0 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU0>; + clock-names = "fck"; #renesas,channels = <3>; @@ -181,6 +187,8 @@ interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>, <0 37 IRQ_TYPE_LEVEL_HIGH>, <0 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU1>; + clock-names = "fck"; #renesas,channels = <3>; @@ -193,6 +201,8 @@ interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, <0 41 IRQ_TYPE_LEVEL_HIGH>, <0 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_TMU2>; + clock-names = "fck"; #renesas,channels = <3>; @@ -203,6 +213,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -210,6 +222,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -217,6 +231,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -224,6 +240,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -231,6 +249,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -238,6 +258,8 @@ compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; + clock-names = "sci_ick"; status = "disabled"; }; @@ -245,6 +267,7 @@ compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_MMC>; status = "disabled"; }; @@ -252,6 +275,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4c000 0x100>; interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI0>; status = "disabled"; }; @@ -259,6 +283,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4d000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI1>; status = "disabled"; }; @@ -266,6 +291,7 @@ compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4f000 0x100>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7778_CLK_SDHI2>; status = "disabled"; }; @@ -273,6 +299,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc7000 0x18>; interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_HSPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -282,6 +309,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc8000 0x18>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_HSPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -291,6 +319,7 @@ compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc6000 0x18>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7778_CLK_HSPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- cgit 1.4.1 From 05cabb839e87a69f94d1e97fd2300b70f688122b Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:52 +0100 Subject: ARM: shmobile: r8a7778: add internal ethernet controller to DT Internal Ethernet controller DT entry with clock information. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 5c347e8d7ded..c802e72a73bd 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -41,6 +41,17 @@ spi2 = &hspi2; }; + ether: ethernet@fde00000 { + compatible = "renesas,ether-r8a7778"; + reg = <0xfde00000 0x400>; + interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp1_clks R8A7778_CLK_ETHER>; + phy-mode = "rmii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@fe438000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; -- cgit 1.4.1 From 1898fe1952c2aeb847c4aa5b897605373f0498cf Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:53 +0100 Subject: ARM: shmobile: bockw: add USB, VIN pin descriptions to DT Adds pin control info for USB host and video-in devices. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778-bockw.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index 73472232fa3c..96cfcdc7b19b 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -98,6 +98,26 @@ renesas,groups = "hspi0_a"; renesas,function = "hspi0"; }; + + usb0_pins: usb0 { + renesas,groups = "usb0"; + renesas,function = "usb0"; + }; + + usb1_pins: usb1 { + renesas,groups = "usb1"; + renesas,function = "usb1"; + }; + + vin0_pins: vin0 { + renesas,groups = "vin0_data8", "vin0_clk"; + renesas,function = "vin0"; + }; + + vin1_pins: vin1 { + renesas,groups = "vin1_data8", "vin1_clk"; + renesas,function = "vin1"; + }; }; &sdhi0 { -- cgit 1.4.1 From d4578204e7af962c70a649ce2a46dc6fbe137db6 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Mon, 16 Feb 2015 17:58:57 +0100 Subject: ARM: shmobile: r8a7778 dtsi: Add Bus State Controller node Add a node for the Bus State Controller (BSC) on r8a7778, to which multiple external devices can be connected. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index c802e72a73bd..5d486b9390b8 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -41,6 +41,13 @@ spi2 = &hspi2; }; + bsc: bus@1c000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x1c000000>; + }; + ether: ethernet@fde00000 { compatible = "renesas,ether-r8a7778"; reg = <0xfde00000 0x400>; -- cgit 1.4.1 From 040d64d6e0ef6b583ec6572d2266b0077c6184cf Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 26 Jan 2015 15:17:58 +0900 Subject: ARM: shmobile: mackerel: Remove ZBOOT code Remove ZBOOT support code for Mackerel. With this patch in place it is no longer possible to boot a self-contained kernel directly from the reset vector. ZBOOT is still supported on kzm9g. Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- .../mach-shmobile/include/mach/head-mackerel.txt | 93 ---------------------- arch/arm/mach-shmobile/include/mach/mmc-mackerel.h | 38 --------- arch/arm/mach-shmobile/include/mach/mmc.h | 5 -- arch/arm/mach-shmobile/include/mach/zboot.h | 5 +- 4 files changed, 1 insertion(+), 140 deletions(-) delete mode 100644 arch/arm/mach-shmobile/include/mach/head-mackerel.txt delete mode 100644 arch/arm/mach-shmobile/include/mach/mmc-mackerel.h (limited to 'arch') diff --git a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt deleted file mode 100644 index 9f134dfeffdc..000000000000 --- a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt +++ /dev/null @@ -1,93 +0,0 @@ -LIST "partner-jet-setup.txt" -LIST "(C) Copyright 2010 Renesas Solutions Corp" -LIST "Kuninori Morimoto " - -LIST "RWT Setting" -EW 0xE6020004, 0xA500 -EW 0xE6030004, 0xA500 - -LIST "GPIO Setting" -EB 0xE6051013, 0xA2 - -LIST "CPG" -ED 0xE61500C0, 0x00000002 - -WAIT 1, 0xFE40009C - -LIST "FRQCR" -ED 0xE6150000, 0x2D1305C3 -ED 0xE61500E0, 0x9E40358E -ED 0xE6150004, 0x80331050 - -WAIT 1, 0xFE40009C - -ED 0xE61500E4, 0x00002000 - -WAIT 1, 0xFE40009C - -LIST "PLL" -ED 0xE6150028, 0x00004000 - -WAIT 1, 0xFE40009C - -ED 0xE615002C, 0x93000040 - -WAIT 1, 0xFE40009C - -LIST "SUB/USBClk" -ED 0xE6150080, 0x00000180 - -LIST "BSC" -ED 0xFEC10000, 0x00E0001B - -LIST "SBSC1" -ED 0xFE400354, 0x01AD8000 -ED 0xFE400354, 0x01AD8001 - -WAIT 5, 0xFE40009C - -ED 0xFE400008, 0xBCC90151 -ED 0xFE400040, 0x41774113 -ED 0xFE400044, 0x2712E229 -ED 0xFE400048, 0x20C18505 -ED 0xFE40004C, 0x00110209 -ED 0xFE400010, 0x00000087 - -WAIT 30, 0xFE40009C - -ED 0xFE400084, 0x0000003F -EB 0xFE500000, 0x00 - -WAIT 5, 0xFE40009C - -ED 0xFE400084, 0x0000FF0A -EB 0xFE500000, 0x00 - -WAIT 1, 0xFE40009C - -ED 0xFE400084, 0x00002201 -EB 0xFE500000, 0x00 -ED 0xFE400084, 0x00000302 -EB 0xFE500000, 0x00 -EB 0xFE5C0000, 0x00 -ED 0xFE400008, 0xBCC90159 -ED 0xFE40008C, 0x88800004 -ED 0xFE400094, 0x00000004 -ED 0xFE400028, 0xA55A0032 -ED 0xFE40002C, 0xA55A000C -ED 0xFE400020, 0xA55A2048 -ED 0xFE400008, 0xBCC90959 - -LIST "Change CPGA setting" -ED 0xE61500E0, 0x9E40352E -ED 0xE6150004, 0x80331050 - -WAIT 1, 0xFE40009C - -ED 0xFE400354, 0x01AD8002 - -LIST "SCIF0 - Serial port for earlyprintk" -EB 0xE6053098, 0xe1 -EW 0xE6C40000, 0x0000 -EB 0xE6C40004, 0x19 -EW 0xE6C40008, 0x0030 diff --git a/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h deleted file mode 100644 index 15d3a9efdec2..000000000000 --- a/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef MMC_MACKEREL_H -#define MMC_MACKEREL_H - -#define PORT0CR (void __iomem *)0xe6051000 -#define PORT1CR (void __iomem *)0xe6051001 -#define PORT2CR (void __iomem *)0xe6051002 -#define PORT159CR (void __iomem *)0xe605009f - -#define PORTR031_000DR (void __iomem *)0xe6055000 -#define PORTL159_128DR (void __iomem *)0xe6054010 - -static inline void mmc_init_progress(void) -{ - /* Initialise LEDS0-3 - * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control) - * value: 0x10 - enable output - */ - __raw_writeb(0x10, PORT0CR); - __raw_writeb(0x10, PORT1CR); - __raw_writeb(0x10, PORT2CR); - __raw_writeb(0x10, PORT159CR); -} - -static inline void mmc_update_progress(int n) -{ - unsigned a = 0, b = 0; - - if (n < 3) - a = 1 << n; - else - b = 1 << 31; - - __raw_writel((__raw_readl(PORTR031_000DR) & ~0x7) | a, - PORTR031_000DR); - __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b, - PORTL159_128DR); -} -#endif /* MMC_MACKEREL_H */ diff --git a/arch/arm/mach-shmobile/include/mach/mmc.h b/arch/arm/mach-shmobile/include/mach/mmc.h index e979b8fc1da2..b7d68e44d21e 100644 --- a/arch/arm/mach-shmobile/include/mach/mmc.h +++ b/arch/arm/mach-shmobile/include/mach/mmc.h @@ -7,10 +7,5 @@ * **************************************************/ -#ifdef CONFIG_MACH_MACKEREL -#include "mach/mmc-mackerel.h" -#else #error "unsupported board." -#endif - #endif /* MMC_H */ diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h index 727cc78ac8ec..9d9cb09c9336 100644 --- a/arch/arm/mach-shmobile/include/mach/zboot.h +++ b/arch/arm/mach-shmobile/include/mach/zboot.h @@ -9,10 +9,7 @@ * **************************************************/ -#ifdef CONFIG_MACH_MACKEREL -#define MEMORY_START 0x40000000 -#include "mach/head-mackerel.txt" -#elif defined(CONFIG_MACH_KZM9G) || defined(CONFIG_MACH_KZM9G_REFERENCE) +#if defined(CONFIG_MACH_KZM9G) || defined(CONFIG_MACH_KZM9G_REFERENCE) #define MEMORY_START 0x43000000 #include "mach/head-kzm9g.txt" #else -- cgit 1.4.1 From a521422ea4ae6128474f7705f02f6ab5cebf8675 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 26 Jan 2015 15:18:08 +0900 Subject: ARM: shmobile: mackerel: Remove Legacy C board code Remove legacy C code for the sh7372 Mackerel board. There is no DT multiplatform implementation available for the sh7372 SoC so simply phase out the board and SoC code support. Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 9 - arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/Makefile.boot | 1 - arch/arm/mach-shmobile/board-mackerel.c | 1522 ------------------------------- 4 files changed, 1533 deletions(-) delete mode 100644 arch/arm/mach-shmobile/board-mackerel.c (limited to 'arch') diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 2f36c85eec4b..0a0b7d6f1c09 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -154,15 +154,6 @@ config MACH_APE6EVM_REFERENCE This is intended to aid developers -config MACH_MACKEREL - bool "mackerel board" - depends on ARCH_SH7372 - select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR - select SMSC_PHY if SMSC911X - select SND_SOC_AK4642 if SND_SIMPLE_CARD - select USE_OF - config MACH_ARMADILLO800EVA bool "Armadillo-800 EVA board" depends on ARCH_R8A7740 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index d53996e6da97..5ae3328c4761 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -60,7 +60,6 @@ obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o else obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o -obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o obj-$(CONFIG_MACH_BOCKW) += board-bockw.o obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o obj-$(CONFIG_MACH_MARZEN) += board-marzen.o diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot index 02532bea5300..c496af795a6e 100644 --- a/arch/arm/mach-shmobile/Makefile.boot +++ b/arch/arm/mach-shmobile/Makefile.boot @@ -7,7 +7,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000 -loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000 loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000 __ZRELADDR := $(sort $(loadaddr-y)) diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c deleted file mode 100644 index a1c1dfb6a67a..000000000000 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ /dev/null @@ -1,1522 +0,0 @@ -/* - * mackerel board support - * - * Copyright (C) 2010 Renesas Solutions Corp. - * Kuninori Morimoto - * - * based on ap4evb - * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2008 Yoshihiro Shimoda - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include