From db9bf4d6577f23b9a9ee4f70c07a51946ed111a7 Mon Sep 17 00:00:00 2001 From: Naveen Krishna Chatradhi Date: Tue, 16 Sep 2014 09:58:00 +0100 Subject: ARM: dts: exynos: Add sysreg phandle to ADC node Instead of using the ADC_PHY register base address, use sysreg phandle in ADC node to control ADC_PHY configuration register. This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250, and Exynos5420, Exynos5800. Signed-off-by: Naveen Krishna Chatradhi To: linux-samsung-soc@vger.kernel.org Acked-by: Kukjin Kim Signed-off-by: Jonathan Cameron --- arch/arm/boot/dts/exynos3250.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/exynos3250.dtsi') diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 1d52de6370d5..b997a4c89eea 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -272,12 +272,13 @@ adc: adc@126C0000 { compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2"; - reg = <0x126C0000 0x100>, <0x10020718 0x4>; + reg = <0x126C0000 0x100>; interrupts = <0 137 0>; clock-names = "adc", "sclk"; clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; #io-channel-cells = <1>; io-channel-ranges; + samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; }; -- cgit 1.4.1