From b3fd27e9150f7ac2a2bd3f61aa71aadb4db499b2 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 20 Mar 2018 14:07:56 +0100 Subject: dt-bindings: Add vendor prefix for Microsemi Corporation Microsemi Corporation provides semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Signed-off-by: Alexandre Belloni Acked-by: Rob Herring Cc: Ralf Baechle Cc: Allan Nielsen Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18853/ Signed-off-by: James Hogan --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index ae850d6c0ad3..ffc959ef53e9 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -224,6 +224,7 @@ motorola Motorola, Inc. moxa Moxa Inc. mpl MPL AG mqmaker mqmaker Inc. +mscc Microsemi Corporation msi Micro-Star International Co. Ltd. mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.) multi-inno Multi-Inno Technology Co.,Ltd -- cgit 1.4.1 From 2707177e86ec9b25c0988c2cc827acbae409b376 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 20 Mar 2018 14:07:57 +0100 Subject: dt-bindings: mips: Add bindings for Microsemi SoCs Add bindings for Microsemi SoCs. Currently only Ocelot is supported. Signed-off-by: Alexandre Belloni Reviewed-by: Rob Herring Cc: Ralf Baechle Cc: Allan Nielsen Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18854/ Signed-off-by: James Hogan --- Documentation/devicetree/bindings/mips/mscc.txt | 43 +++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/mscc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt new file mode 100644 index 000000000000..ae15ec333542 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/mscc.txt @@ -0,0 +1,43 @@ +* Microsemi MIPS CPUs + +Boards with a SoC of the Microsemi MIPS family shall have the following +properties: + +Required properties: +- compatible: "mscc,ocelot" + + +* Other peripherals: + +o CPU chip regs: + +The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous +functionalities: chip ID, general purpose register for software use, reset +controller, hardware status and configuration, efuses. + +Required properties: +- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon" +- reg : Should contain registers location and length + +Example: + syscon@71070000 { + compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; + reg = <0x71070000 0x1c>; + }; + + +o CPU system control: + +The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of +the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU +endianness, CPU bus control, CPU status. + +Required properties: +- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" +- reg : Should contain registers location and length + +Example: + syscon@70000000 { + compatible = "mscc,ocelot-cpu-syscon", "syscon"; + reg = <0x70000000 0x2c>; + }; -- cgit 1.4.1