From 3abee4579484c554961bb0af92a77adc0ebd791d Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:29 +0200 Subject: mfd: Add simple regmap based I2C driver There are I2C devices which contain several different functions but doesn't require any special access functions. For these kind of drivers an I2C regmap should be enough. Create an I2C driver which creates an I2C regmap and enumerates its children. If a device wants to use this as its MFD core driver, it has to add an individual compatible string. It may provide its own regmap configuration. Subdevices can use dev_get_regmap() on the parent to get their regmap instance. Signed-off-by: Michael Walle Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 12 ++++++++++ drivers/mfd/Makefile | 1 + drivers/mfd/simple-mfd-i2c.c | 56 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 69 insertions(+) create mode 100644 drivers/mfd/simple-mfd-i2c.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 33df0837ab41..6e1a38944d28 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1162,6 +1162,18 @@ config MFD_SI476X_CORE To compile this driver as a module, choose M here: the module will be called si476x-core. +config MFD_SIMPLE_MFD_I2C + tristate + depends on I2C + select REGMAP_I2C + help + This driver creates a single register map with the intention for it + to be shared by all sub-devices. + + Once the register map has been successfully initialised, any + sub-devices represented by child nodes in Device Tree will be + subsequently registered. + config MFD_SM501 tristate "Silicon Motion SM501" depends on HAS_DMA diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index a60e5f835283..78d24a3e7c9e 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -264,3 +264,4 @@ obj-$(CONFIG_MFD_STMFX) += stmfx.o obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o +obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c new file mode 100644 index 000000000000..28e96a246be1 --- /dev/null +++ b/drivers/mfd/simple-mfd-i2c.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Simple MFD - I2C + * + * This driver creates a single register map with the intention for it to be + * shared by all sub-devices. Children can use their parent's device structure + * (dev.parent) in order to reference it. + * + * Once the register map has been successfully initialised, any sub-devices + * represented by child nodes in Device Tree will be subsequently registered. + */ + +#include +#include +#include +#include +#include + +static const struct regmap_config simple_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int simple_mfd_i2c_probe(struct i2c_client *i2c) +{ + const struct regmap_config *config; + struct regmap *regmap; + + config = device_get_match_data(&i2c->dev); + if (!config) + config = &simple_regmap_config; + + regmap = devm_regmap_init_i2c(i2c, config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + return devm_of_platform_populate(&i2c->dev); +} + +static const struct of_device_id simple_mfd_i2c_of_match[] = { + {} +}; +MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); + +static struct i2c_driver simple_mfd_i2c_driver = { + .probe_new = simple_mfd_i2c_probe, + .driver = { + .name = "simple-mfd-i2c", + .of_match_table = simple_mfd_i2c_of_match, + }, +}; +module_i2c_driver(simple_mfd_i2c_driver); + +MODULE_AUTHOR("Michael Walle "); +MODULE_DESCRIPTION("Simple MFD - I2C driver"); +MODULE_LICENSE("GPL v2"); -- cgit 1.4.1 From 48e28a249e3bcc31e6a2d27267410a6f5a03e39e Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:30 +0200 Subject: dt-bindings: mfd: Add bindings for sl28cpld Add a device tree bindings for the board management controller found on the Kontron SMARC-sAL28 board. Signed-off-by: Michael Walle Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../bindings/gpio/kontron,sl28cpld-gpio.yaml | 54 ++++++++ .../bindings/hwmon/kontron,sl28cpld-hwmon.yaml | 27 ++++ .../kontron,sl28cpld-intc.yaml | 54 ++++++++ .../devicetree/bindings/mfd/kontron,sl28cpld.yaml | 153 +++++++++++++++++++++ .../bindings/pwm/kontron,sl28cpld-pwm.yaml | 35 +++++ .../bindings/watchdog/kontron,sl28cpld-wdt.yaml | 35 +++++ 6 files changed, 358 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml create mode 100644 Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml create mode 100644 Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml create mode 100644 Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml create mode 100644 Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml new file mode 100644 index 000000000000..e2d2c10e536a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/kontron,sl28cpld-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + There are three flavors of the GPIO controller, one full featured + input/output with interrupt support (kontron,sl28cpld-gpio), one + output-only (kontron,sl28-gpo) and one input-only (kontron,sl28-gpi). + + Each controller supports 8 GPIO lines. + +properties: + compatible: + enum: + - kontron,sl28cpld-gpio + - kontron,sl28cpld-gpi + - kontron,sl28cpld-gpo + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-line-names: + minItems: 1 + maxItems: 8 + +required: + - compatible + - "#gpio-cells" + - gpio-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml new file mode 100644 index 000000000000..010333cb25c0 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/kontron,sl28cpld-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hardware monitoring driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + +properties: + compatible: + enum: + - kontron,sl28cpld-fan + + reg: + maxItems: 1 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml new file mode 100644 index 000000000000..e8dfa6507f64 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/kontron,sl28cpld-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Interrupt controller driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + The following interrupts are available. All types and levels are fixed + and handled by the board management controller. + + ==== ============= ================================== + IRQ line/device description + ==== ============= ================================== + 0 RTC_INT# Interrupt line from on-board RTC + 1 SMB_ALERT# Event on SMB_ALERT# line (P1) + 2 ESPI_ALERT0# Event on ESPI_ALERT0# line (S43) + 3 ESPI_ALERT1# Event on ESPI_ALERT1# line (S44) + 4 PWR_BTN# Event on PWR_BTN# line (P128) + 5 SLEEP# Event on SLEEP# line (S149) + 6 watchdog Interrupt of the internal watchdog + 7 n/a not used + ==== ============= ================================== + +properties: + compatible: + enum: + - kontron,sl28cpld-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + +required: + - compatible + - interrupts + - "#interrupt-cells" + - interrupt-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml new file mode 100644 index 000000000000..eb3b43547cb6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/kontron,sl28cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kontron's sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + The board management controller may contain different IP blocks like + watchdog, fan monitoring, PWM controller, interrupt controller and a + GPIO controller. + +properties: + compatible: + const: kontron,sl28cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: ../gpio/kontron,sl28cpld-gpio.yaml + + "^hwmon(@[0-9a-f]+)?$": + $ref: ../hwmon/kontron,sl28cpld-hwmon.yaml + + "^interrupt-controller(@[0-9a-f]+)?$": + $ref: ../interrupt-controller/kontron,sl28cpld-intc.yaml + + "^pwm(@[0-9a-f]+)?$": + $ref: ../pwm/kontron,sl28cpld-pwm.yaml + + "^watchdog(@[0-9a-f]+)?$": + $ref: ../watchdog/kontron,sl28cpld-wdt.yaml + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sl28cpld@4a { + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + + watchdog@4 { + compatible = "kontron,sl28cpld-wdt"; + reg = <0x4>; + kontron,assert-wdt-timeout-pin; + }; + + hwmon@b { + compatible = "kontron,sl28cpld-fan"; + reg = <0xb>; + }; + + pwm@c { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xc>; + #pwm-cells = <2>; + }; + + pwm@e { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xe>; + #pwm-cells = <2>; + }; + + gpio@10 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x10>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "a", "b", "c"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@15 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x15>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@1a { + compatible = "kontron,sl28cpld-gpo"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@1b { + compatible = "kontron,sl28cpld-gpi"; + reg = <0x1b>; + + gpio-controller; + #gpio-cells = <2>; + }; + + interrupt-controller@1c { + compatible = "kontron,sl28cpld-intc"; + reg = <0x1c>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml new file mode 100644 index 000000000000..981cfec53f37 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/kontron,sl28cpld-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PWM driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + The controller supports one PWM channel and supports only four distinct + frequencies (250Hz, 500Hz, 1kHz, 2kHz). + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: kontron,sl28cpld-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml new file mode 100644 index 000000000000..179272f74de5 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/kontron,sl28cpld-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Watchdog driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + const: kontron,sl28cpld-wdt + + reg: + maxItems: 1 + + kontron,assert-wdt-timeout-pin: + description: The SMARC standard defines a WDT_TIME_OUT# pin. If this + property is set, this output will be pulsed when the watchdog bites + and the system resets. + type: boolean + +required: + - compatible + +additionalProperties: false -- cgit 1.4.1 From a538ad229bbee4f8c68204c75b2e1ae43db875d6 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:31 +0200 Subject: mfd: simple-mfd-i2c: Add sl28cpld support Add the core support for the board management controller found on the SMARC-sAL28 board. Also add a virtual symbol which pulls in the simple-mfd-i2c driver and provide a common symbol on which the subdevice drivers can depend on. At the moment, this controller is used on the Kontron SMARC-sAL28 board. Signed-off-by: Michael Walle Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 10 ++++++++++ drivers/mfd/simple-mfd-i2c.c | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6e1a38944d28..ed90eb5bdc83 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1174,6 +1174,16 @@ config MFD_SIMPLE_MFD_I2C sub-devices represented by child nodes in Device Tree will be subsequently registered. +config MFD_SL28CPLD + tristate "Kontron sl28cpld Board Management Controller" + select MFD_SIMPLE_MFD_I2C + help + Say yes here to enable support for the Kontron sl28cpld board + management controller. + + It can be found on the following boards: + * SMARC-sAL28 + config MFD_SM501 tristate "Silicon Motion SM501" depends on HAS_DMA diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 28e96a246be1..87f684cff9a1 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -38,6 +38,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c) } static const struct of_device_id simple_mfd_i2c_of_match[] = { + { .compatible = "kontron,sl28cpld" }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); -- cgit 1.4.1 From 03ac990e0ac0c2823282d5b8dd2d536d88bbe6c2 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:32 +0200 Subject: irqchip: Add sl28cpld interrupt controller support Add support for the interrupt controller inside the sl28 CPLD management controller. The interrupt controller can handle at most 8 interrupts and is really simplistic and consists only of an interrupt mask and an interrupt pending register. Signed-off-by: Michael Walle Acked-by: Marc Zyngier Signed-off-by: Lee Jones --- drivers/irqchip/Kconfig | 8 ++++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sl28cpld.c | 96 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) create mode 100644 drivers/irqchip/irq-sl28cpld.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index bb70b7177f94..19cd32ba2155 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -246,6 +246,14 @@ config RENESAS_RZA1_IRQC Enable support for the Renesas RZ/A1 Interrupt Controller, to use up to 8 external interrupts with configurable sense select. +config SL28CPLD_INTC + bool "Kontron sl28cpld IRQ controller" + depends on MFD_SL28CPLD=y || COMPILE_TEST + select REGMAP_IRQ + help + Interrupt controller driver for the board management controller + found on the Kontron sl28 CPLD. + config ST_IRQCHIP bool select REGMAP diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 133f9c45744a..39af7d89204d 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -111,3 +111,4 @@ obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o +obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o diff --git a/drivers/irqchip/irq-sl28cpld.c b/drivers/irqchip/irq-sl28cpld.c new file mode 100644 index 000000000000..0aa50d025ef6 --- /dev/null +++ b/drivers/irqchip/irq-sl28cpld.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld interrupt controller driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include + +#define INTC_IE 0x00 +#define INTC_IP 0x01 + +static const struct regmap_irq sl28cpld_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +struct sl28cpld_intc { + struct regmap *regmap; + struct regmap_irq_chip chip; + struct regmap_irq_chip_data *irq_data; +}; + +static int sl28cpld_intc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sl28cpld_intc *irqchip; + int irq; + u32 base; + int ret; + + if (!dev->parent) + return -ENODEV; + + irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL); + if (!irqchip) + return -ENOMEM; + + irqchip->regmap = dev_get_regmap(dev->parent, NULL); + if (!irqchip->regmap) + return -ENODEV; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + irqchip->chip.name = "sl28cpld-intc"; + irqchip->chip.irqs = sl28cpld_irqs; + irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs); + irqchip->chip.num_regs = 1; + irqchip->chip.status_base = base + INTC_IP; + irqchip->chip.mask_base = base + INTC_IE; + irqchip->chip.mask_invert = true, + irqchip->chip.ack_base = base + INTC_IP; + + return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev), + irqchip->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, 0, + &irqchip->chip, + &irqchip->irq_data); +} + +static const struct of_device_id sl28cpld_intc_of_match[] = { + { .compatible = "kontron,sl28cpld-intc" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match); + +static struct platform_driver sl28cpld_intc_driver = { + .probe = sl28cpld_intc_probe, + .driver = { + .name = "sl28cpld-intc", + .of_match_table = sl28cpld_intc_of_match, + } +}; +module_platform_driver(sl28cpld_intc_driver); + +MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); -- cgit 1.4.1 From 85174ca663767c1c6f8dca3b0a2acfd4b5c37289 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:33 +0200 Subject: watchdog: add support for sl28cpld watchdog Add support for the watchdog of the sl28cpld board management controller. This is part of a multi-function device driver. Signed-off-by: Michael Walle Acked-by: Guenter Roeck Signed-off-by: Lee Jones --- drivers/watchdog/Kconfig | 11 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sl28cpld_wdt.c | 229 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 241 insertions(+) create mode 100644 drivers/watchdog/sl28cpld_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ab7aad5a1e69..ba698340ed6f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -340,6 +340,17 @@ config MLX_WDT To compile this driver as a module, choose M here: the module will be called mlx-wdt. +config SL28CPLD_WATCHDOG + tristate "Kontron sl28cpld Watchdog" + depends on MFD_SL28CPLD || COMPILE_TEST + select WATCHDOG_CORE + help + Say Y here to include support for the watchdog timer + on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the + module will be called sl28cpld_wdt. + # ALPHA Architecture # ARM Architecture diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 97bed1d3d97c..aa6e41126901 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -225,3 +225,4 @@ obj-$(CONFIG_MENF21BMC_WATCHDOG) += menf21bmc_wdt.o obj-$(CONFIG_MENZ069_WATCHDOG) += menz69_wdt.o obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o +obj-$(CONFIG_SL28CPLD_WATCHDOG) += sl28cpld_wdt.o diff --git a/drivers/watchdog/sl28cpld_wdt.c b/drivers/watchdog/sl28cpld_wdt.c new file mode 100644 index 000000000000..a45047d8d9ab --- /dev/null +++ b/drivers/watchdog/sl28cpld_wdt.c @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld watchdog driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * Watchdog timer block registers. + */ +#define WDT_CTRL 0x00 +#define WDT_CTRL_EN BIT(0) +#define WDT_CTRL_LOCK BIT(2) +#define WDT_CTRL_ASSERT_SYS_RESET BIT(6) +#define WDT_CTRL_ASSERT_WDT_TIMEOUT BIT(7) +#define WDT_TIMEOUT 0x01 +#define WDT_KICK 0x02 +#define WDT_KICK_VALUE 0x6b +#define WDT_COUNT 0x03 + +#define WDT_DEFAULT_TIMEOUT 10 + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +static int timeout; +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds"); + +struct sl28cpld_wdt { + struct watchdog_device wdd; + struct regmap *regmap; + u32 offset; + bool assert_wdt_timeout; +}; + +static int sl28cpld_wdt_ping(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + return regmap_write(wdt->regmap, wdt->offset + WDT_KICK, + WDT_KICK_VALUE); +} + +static int sl28cpld_wdt_start(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + unsigned int val; + + val = WDT_CTRL_EN | WDT_CTRL_ASSERT_SYS_RESET; + if (wdt->assert_wdt_timeout) + val |= WDT_CTRL_ASSERT_WDT_TIMEOUT; + if (nowayout) + val |= WDT_CTRL_LOCK; + + return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL, + val, val); +} + +static int sl28cpld_wdt_stop(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL, + WDT_CTRL_EN, 0); +} + +static unsigned int sl28cpld_wdt_get_timeleft(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + unsigned int val; + int ret; + + ret = regmap_read(wdt->regmap, wdt->offset + WDT_COUNT, &val); + if (ret) + return 0; + + return val; +} + +static int sl28cpld_wdt_set_timeout(struct watchdog_device *wdd, + unsigned int timeout) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + int ret; + + ret = regmap_write(wdt->regmap, wdt->offset + WDT_TIMEOUT, timeout); + if (ret) + return ret; + + wdd->timeout = timeout; + + return 0; +} + +static const struct watchdog_info sl28cpld_wdt_info = { + .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, + .identity = "sl28cpld watchdog", +}; + +static struct watchdog_ops sl28cpld_wdt_ops = { + .owner = THIS_MODULE, + .start = sl28cpld_wdt_start, + .stop = sl28cpld_wdt_stop, + .ping = sl28cpld_wdt_ping, + .set_timeout = sl28cpld_wdt_set_timeout, + .get_timeleft = sl28cpld_wdt_get_timeleft, +}; + +static int sl28cpld_wdt_probe(struct platform_device *pdev) +{ + struct watchdog_device *wdd; + struct sl28cpld_wdt *wdt; + unsigned int status; + unsigned int val; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); + if (!wdt) + return -ENOMEM; + + wdt->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!wdt->regmap) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &wdt->offset); + if (ret) + return -EINVAL; + + wdt->assert_wdt_timeout = device_property_read_bool(&pdev->dev, + "kontron,assert-wdt-timeout-pin"); + + /* initialize struct watchdog_device */ + wdd = &wdt->wdd; + wdd->parent = &pdev->dev; + wdd->info = &sl28cpld_wdt_info; + wdd->ops = &sl28cpld_wdt_ops; + wdd->min_timeout = 1; + wdd->max_timeout = 255; + + watchdog_set_drvdata(wdd, wdt); + watchdog_stop_on_reboot(wdd); + + /* + * Read the status early, in case of an error, we haven't modified the + * hardware. + */ + ret = regmap_read(wdt->regmap, wdt->offset + WDT_CTRL, &status); + if (ret) + return ret; + + /* + * Initial timeout value, may be overwritten by device tree or module + * parmeter in watchdog_init_timeout(). + * + * Reading a zero here means that either the hardware has a default + * value of zero (which is very unlikely and definitely a hardware + * bug) or the bootloader set it to zero. In any case, we handle + * this case gracefully and set out own timeout. + */ + ret = regmap_read(wdt->regmap, wdt->offset + WDT_TIMEOUT, &val); + if (ret) + return ret; + + if (val) + wdd->timeout = val; + else + wdd->timeout = WDT_DEFAULT_TIMEOUT; + + watchdog_init_timeout(wdd, timeout, &pdev->dev); + sl28cpld_wdt_set_timeout(wdd, wdd->timeout); + + /* if the watchdog is locked, we set nowayout */ + if (status & WDT_CTRL_LOCK) + nowayout = true; + watchdog_set_nowayout(wdd, nowayout); + + /* + * If watchdog is already running, keep it enabled, but make + * sure its mode is set correctly. + */ + if (status & WDT_CTRL_EN) { + sl28cpld_wdt_start(wdd); + set_bit(WDOG_HW_RUNNING, &wdd->status); + } + + ret = devm_watchdog_register_device(&pdev->dev, wdd); + if (ret < 0) { + dev_err(&pdev->dev, "failed to register watchdog device\n"); + return ret; + } + + dev_info(&pdev->dev, "initial timeout %d sec%s\n", + wdd->timeout, nowayout ? ", nowayout" : ""); + + return 0; +} + +static const struct of_device_id sl28cpld_wdt_of_match[] = { + { .compatible = "kontron,sl28cpld-wdt" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_wdt_of_match); + +static struct platform_driver sl28cpld_wdt_driver = { + .probe = sl28cpld_wdt_probe, + .driver = { + .name = "sl28cpld-wdt", + .of_match_table = sl28cpld_wdt_of_match, + }, +}; +module_platform_driver(sl28cpld_wdt_driver); + +MODULE_DESCRIPTION("sl28cpld Watchdog Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); -- cgit 1.4.1 From 9db33d221efcca9503ac481edcbf2b3f4404bdb8 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:34 +0200 Subject: pwm: Add support for sl28cpld PWM controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the PWM controller of the sl28cpld board management controller. This is part of a multi-function device driver. The controller has one PWM channel and can just generate four distinct frequencies. Signed-off-by: Michael Walle Acked-by: Thierry Reding Reviewed-by: Uwe Kleine-König Signed-off-by: Lee Jones --- drivers/pwm/Kconfig | 10 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-sl28cpld.c | 270 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 281 insertions(+) create mode 100644 drivers/pwm/pwm-sl28cpld.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 7dbcf6973d33..78ddc127e45e 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -428,6 +428,16 @@ config PWM_SIFIVE To compile this driver as a module, choose M here: the module will be called pwm-sifive. +config PWM_SL28CPLD + tristate "Kontron sl28cpld PWM support" + depends on MFD_SL28CPLD || COMPILE_TEST + help + Generic PWM framework driver for board management controller + found on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the module + will be called pwm-sl28cpld. + config PWM_SPEAR tristate "STMicroelectronics SPEAr PWM support" depends on PLAT_SPEAR || COMPILE_TEST diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 2c2ba0a03557..cbdcd55d69ee 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o +obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o obj-$(CONFIG_PWM_STI) += pwm-sti.o diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c new file mode 100644 index 000000000000..5046b6b7fd35 --- /dev/null +++ b/drivers/pwm/pwm-sl28cpld.c @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld PWM driver + * + * Copyright (c) 2020 Michael Walle + * + * There is no public datasheet available for this PWM core. But it is easy + * enough to be briefly explained. It consists of one 8-bit counter. The PWM + * supports four distinct frequencies by selecting when to reset the counter. + * With the prescaler setting you can select which bit of the counter is used + * to reset it. This implies that the higher the frequency the less remaining + * bits are available for the actual counter. + * + * Let cnt[7:0] be the counter, clocked at 32kHz: + * +-----------+--------+--------------+-----------+---------------+ + * | prescaler | reset | counter bits | frequency | period length | + * +-----------+--------+--------------+-----------+---------------+ + * | 0 | cnt[7] | cnt[6:0] | 250 Hz | 4000000 ns | + * | 1 | cnt[6] | cnt[5:0] | 500 Hz | 2000000 ns | + * | 2 | cnt[5] | cnt[4:0] | 1 kHz | 1000000 ns | + * | 3 | cnt[4] | cnt[3:0] | 2 kHz | 500000 ns | + * +-----------+--------+--------------+-----------+---------------+ + * + * Limitations: + * - The hardware cannot generate a 100% duty cycle if the prescaler is 0. + * - The hardware cannot atomically set the prescaler and the counter value, + * which might lead to glitches and inconsistent states if a write fails. + * - The counter is not reset if you switch the prescaler which leads + * to glitches, too. + * - The duty cycle will switch immediately and not after a complete cycle. + * - Depending on the actual implementation, disabling the PWM might have + * side effects. For example, if the output pin is shared with a GPIO pin + * it will automatically switch back to GPIO mode. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * PWM timer block registers. + */ +#define SL28CPLD_PWM_CTRL 0x00 +#define SL28CPLD_PWM_CTRL_ENABLE BIT(7) +#define SL28CPLD_PWM_CTRL_PRESCALER_MASK GENMASK(1, 0) +#define SL28CPLD_PWM_CYCLE 0x01 +#define SL28CPLD_PWM_CYCLE_MAX GENMASK(6, 0) + +#define SL28CPLD_PWM_CLK 32000 /* 32 kHz */ +#define SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler) (1 << (7 - (prescaler))) +#define SL28CPLD_PWM_PERIOD(prescaler) \ + (NSEC_PER_SEC / SL28CPLD_PWM_CLK * SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)) + +/* + * We calculate the duty cycle like this: + * duty_cycle_ns = pwm_cycle_reg * max_period_ns / max_duty_cycle + * + * With + * max_period_ns = 1 << (7 - prescaler) / SL28CPLD_PWM_CLK * NSEC_PER_SEC + * max_duty_cycle = 1 << (7 - prescaler) + * this then simplifies to: + * duty_cycle_ns = pwm_cycle_reg / SL28CPLD_PWM_CLK * NSEC_PER_SEC + * = NSEC_PER_SEC / SL28CPLD_PWM_CLK * pwm_cycle_reg + * + * NSEC_PER_SEC is a multiple of SL28CPLD_PWM_CLK, therefore we're not losing + * precision by doing the divison first. + */ +#define SL28CPLD_PWM_TO_DUTY_CYCLE(reg) \ + (NSEC_PER_SEC / SL28CPLD_PWM_CLK * (reg)) +#define SL28CPLD_PWM_FROM_DUTY_CYCLE(duty_cycle) \ + (DIV_ROUND_DOWN_ULL((duty_cycle), NSEC_PER_SEC / SL28CPLD_PWM_CLK)) + +#define sl28cpld_pwm_read(priv, reg, val) \ + regmap_read((priv)->regmap, (priv)->offset + (reg), (val)) +#define sl28cpld_pwm_write(priv, reg, val) \ + regmap_write((priv)->regmap, (priv)->offset + (reg), (val)) + +struct sl28cpld_pwm { + struct pwm_chip pwm_chip; + struct regmap *regmap; + u32 offset; +}; + +static void sl28cpld_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + unsigned int reg; + int prescaler; + + sl28cpld_pwm_read(priv, SL28CPLD_PWM_CTRL, ®); + + state->enabled = reg & SL28CPLD_PWM_CTRL_ENABLE; + + prescaler = FIELD_GET(SL28CPLD_PWM_CTRL_PRESCALER_MASK, reg); + state->period = SL28CPLD_PWM_PERIOD(prescaler); + + sl28cpld_pwm_read(priv, SL28CPLD_PWM_CYCLE, ®); + state->duty_cycle = SL28CPLD_PWM_TO_DUTY_CYCLE(reg); + state->polarity = PWM_POLARITY_NORMAL; + + /* + * Sanitize values for the PWM core. Depending on the prescaler it + * might happen that we calculate a duty_cycle greater than the actual + * period. This might happen if someone (e.g. the bootloader) sets an + * invalid combination of values. The behavior of the hardware is + * undefined in this case. But we need to report sane values back to + * the PWM core. + */ + state->duty_cycle = min(state->duty_cycle, state->period); +} + +static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + unsigned int cycle, prescaler; + bool write_duty_cycle_first; + int ret; + u8 ctrl; + + /* Polarity inversion is not supported */ + if (state->polarity != PWM_POLARITY_NORMAL) + return -EINVAL; + + /* + * Calculate the prescaler. Pick the biggest period that isn't + * bigger than the requested period. + */ + prescaler = DIV_ROUND_UP_ULL(SL28CPLD_PWM_PERIOD(0), state->period); + prescaler = order_base_2(prescaler); + + if (prescaler > field_max(SL28CPLD_PWM_CTRL_PRESCALER_MASK)) + return -ERANGE; + + ctrl = FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, prescaler); + if (state->enabled) + ctrl |= SL28CPLD_PWM_CTRL_ENABLE; + + cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle); + cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)); + + /* + * Work around the hardware limitation. See also above. Trap 100% duty + * cycle if the prescaler is 0. Set prescaler to 1 instead. We don't + * care about the frequency because its "all-one" in either case. + * + * We don't need to check the actual prescaler setting, because only + * if the prescaler is 0 we can have this particular value. + */ + if (cycle == SL28CPLD_PWM_MAX_DUTY_CYCLE(0)) { + ctrl &= ~SL28CPLD_PWM_CTRL_PRESCALER_MASK; + ctrl |= FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, 1); + cycle = SL28CPLD_PWM_MAX_DUTY_CYCLE(1); + } + + /* + * To avoid glitches when we switch the prescaler, we have to make sure + * we have a valid duty cycle for the new mode. + * + * Take the current prescaler (or the current period length) into + * account to decide whether we have to write the duty cycle or the new + * prescaler first. If the period length is decreasing we have to + * write the duty cycle first. + */ + write_duty_cycle_first = pwm->state.period > state->period; + + if (write_duty_cycle_first) { + ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); + if (ret) + return ret; + } + + ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CTRL, ctrl); + if (ret) + return ret; + + if (!write_duty_cycle_first) { + ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); + if (ret) + return ret; + } + + return 0; +} + +static const struct pwm_ops sl28cpld_pwm_ops = { + .apply = sl28cpld_pwm_apply, + .get_state = sl28cpld_pwm_get_state, + .owner = THIS_MODULE, +}; + +static int sl28cpld_pwm_probe(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv; + struct pwm_chip *chip; + int ret; + + if (!pdev->dev.parent) { + dev_err(&pdev->dev, "no parent device\n"); + return -ENODEV; + } + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!priv->regmap) { + dev_err(&pdev->dev, "could not get parent regmap\n"); + return -ENODEV; + } + + ret = device_property_read_u32(&pdev->dev, "reg", &priv->offset); + if (ret) { + dev_err(&pdev->dev, "no 'reg' property found (%pe)\n", + ERR_PTR(ret)); + return -EINVAL; + } + + /* Initialize the pwm_chip structure */ + chip = &priv->pwm_chip; + chip->dev = &pdev->dev; + chip->ops = &sl28cpld_pwm_ops; + chip->base = -1; + chip->npwm = 1; + + ret = pwmchip_add(&priv->pwm_chip); + if (ret) { + dev_err(&pdev->dev, "failed to add PWM chip (%pe)", + ERR_PTR(ret)); + return ret; + } + + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int sl28cpld_pwm_remove(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv = platform_get_drvdata(pdev); + + return pwmchip_remove(&priv->pwm_chip); +} + +static const struct of_device_id sl28cpld_pwm_of_match[] = { + { .compatible = "kontron,sl28cpld-pwm" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_pwm_of_match); + +static struct platform_driver sl28cpld_pwm_driver = { + .probe = sl28cpld_pwm_probe, + .remove = sl28cpld_pwm_remove, + .driver = { + .name = "sl28cpld-pwm", + .of_match_table = sl28cpld_pwm_of_match, + }, +}; +module_platform_driver(sl28cpld_pwm_driver); + +MODULE_DESCRIPTION("sl28cpld PWM Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); -- cgit 1.4.1 From b7536d8749e54923c9a7e8c4175e1e4f9b8c1541 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:35 +0200 Subject: gpio: Add support for the sl28cpld GPIO controller Add support for the GPIO controller of the sl28 board management controller. This driver is part of a multi-function device. A controller has 8 lines. There are three different flavors: full-featured GPIO with interrupt support, input-only and output-only. Signed-off-by: Michael Walle Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/gpio/Kconfig | 12 ++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-sl28cpld.c | 161 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 174 insertions(+) create mode 100644 drivers/gpio/gpio-sl28cpld.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8030fd91a3cc..3799cb6048a2 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1223,6 +1223,18 @@ config GPIO_RC5T583 This driver provides the support for driving/reading the gpio pins of RC5T583 device through standard gpio library. +config GPIO_SL28CPLD + tristate "Kontron sl28cpld GPIO support" + depends on MFD_SL28CPLD || COMPILE_TEST + select GPIO_REGMAP + select GPIOLIB_IRQCHIP + select REGMAP_IRQ + help + This enables support for the GPIOs found on the Kontron sl28 CPLD. + + This driver can also be built as a module. If so, the module will be + called gpio-sl28cpld. + config GPIO_STMPE bool "STMPE GPIOs" depends on MFD_STMPE diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 4f9abff4f2dc..c3a4e7c94a91 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -132,6 +132,7 @@ obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o +obj-$(CONFIG_GPIO_SL28CPLD) += gpio-sl28cpld.o obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o diff --git a/drivers/gpio/gpio-sl28cpld.c b/drivers/gpio/gpio-sl28cpld.c new file mode 100644 index 000000000000..889b8f5622c2 --- /dev/null +++ b/drivers/gpio/gpio-sl28cpld.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld GPIO driver + * + * Copyright 2020 Michael Walle + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GPIO flavor */ +#define GPIO_REG_DIR 0x00 +#define GPIO_REG_OUT 0x01 +#define GPIO_REG_IN 0x02 +#define GPIO_REG_IE 0x03 +#define GPIO_REG_IP 0x04 + +/* input-only flavor */ +#define GPI_REG_IN 0x00 + +/* output-only flavor */ +#define GPO_REG_OUT 0x00 + +enum sl28cpld_gpio_type { + SL28CPLD_GPIO = 1, + SL28CPLD_GPI, + SL28CPLD_GPO, +}; + +static const struct regmap_irq sl28cpld_gpio_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +static int sl28cpld_gpio_irq_init(struct platform_device *pdev, + unsigned int base, + struct gpio_regmap_config *config) +{ + struct regmap_irq_chip_data *irq_data; + struct regmap_irq_chip *irq_chip; + struct device *dev = &pdev->dev; + int irq, ret; + + if (!device_property_read_bool(dev, "interrupt-controller")) + return 0; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL); + if (!irq_chip) + return -ENOMEM; + + irq_chip->name = "sl28cpld-gpio-irq", + irq_chip->irqs = sl28cpld_gpio_irqs; + irq_chip->num_irqs = ARRAY_SIZE(sl28cpld_gpio_irqs); + irq_chip->num_regs = 1; + irq_chip->status_base = base + GPIO_REG_IP; + irq_chip->mask_base = base + GPIO_REG_IE; + irq_chip->mask_invert = true, + irq_chip->ack_base = base + GPIO_REG_IP; + + ret = devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev), + config->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, + 0, irq_chip, &irq_data); + if (ret) + return ret; + + config->irq_domain = regmap_irq_get_domain(irq_data); + + return 0; +} + +static int sl28cpld_gpio_probe(struct platform_device *pdev) +{ + struct gpio_regmap_config config = {0}; + enum sl28cpld_gpio_type type; + struct regmap *regmap; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + type = (uintptr_t)device_get_match_data(&pdev->dev); + if (!type) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio = 8; + + switch (type) { + case SL28CPLD_GPIO: + config.reg_dat_base = base + GPIO_REG_IN; + config.reg_set_base = base + GPIO_REG_OUT; + /* reg_dir_out_base might be zero */ + config.reg_dir_out_base = GPIO_REGMAP_ADDR(base + GPIO_REG_DIR); + + /* This type supports interrupts */ + ret = sl28cpld_gpio_irq_init(pdev, base, &config); + if (ret) + return ret; + break; + case SL28CPLD_GPO: + config.reg_set_base = base + GPO_REG_OUT; + break; + case SL28CPLD_GPI: + config.reg_dat_base = base + GPI_REG_IN; + break; + default: + dev_err(&pdev->dev, "unknown type %d\n", type); + return -ENODEV; + } + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id sl28cpld_gpio_of_match[] = { + { .compatible = "kontron,sl28cpld-gpio", .data = (void *)SL28CPLD_GPIO }, + { .compatible = "kontron,sl28cpld-gpi", .data = (void *)SL28CPLD_GPI }, + { .compatible = "kontron,sl28cpld-gpo", .data = (void *)SL28CPLD_GPO }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_gpio_of_match); + +static struct platform_driver sl28cpld_gpio_driver = { + .probe = sl28cpld_gpio_probe, + .driver = { + .name = "sl28cpld-gpio", + .of_match_table = sl28cpld_gpio_of_match, + }, +}; +module_platform_driver(sl28cpld_gpio_driver); + +MODULE_DESCRIPTION("sl28cpld GPIO Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); -- cgit 1.4.1 From 3f697027bcb0959d7c24d59550ab1da07c2dd609 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:36 +0200 Subject: hwmon: Add support for the sl28cpld hardware monitoring controller Add support for the hardware monitoring controller of the sl28cpld board management controller. This driver is part of a multi-function device. Signed-off-by: Michael Walle Acked-by: Guenter Roeck Reviewed-by: Andy Shevchenko Signed-off-by: Lee Jones --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sl28cpld.rst | 36 ++++++++++ drivers/hwmon/Kconfig | 10 +++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sl28cpld-hwmon.c | 142 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 190 insertions(+) create mode 100644 Documentation/hwmon/sl28cpld.rst create mode 100644 drivers/hwmon/sl28cpld-hwmon.c diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 750d3a975d82..d90c43c82936 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -154,6 +154,7 @@ Hardware Monitoring Kernel Drivers sht3x shtc1 sis5595 + sl28cpld smm665 smsc47b397 smsc47m192 diff --git a/Documentation/hwmon/sl28cpld.rst b/Documentation/hwmon/sl28cpld.rst new file mode 100644 index 000000000000..7ed65f78250c --- /dev/null +++ b/Documentation/hwmon/sl28cpld.rst @@ -0,0 +1,36 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver sl28cpld +====================== + +Supported chips: + + * Kontron sl28cpld + + Prefix: 'sl28cpld' + + Datasheet: not available + +Authors: Michael Walle + +Description +----------- + +The sl28cpld is a board management controller which also exposes a hardware +monitoring controller. At the moment this controller supports a single fan +supervisor. In the future there might be other flavours and additional +hardware monitoring might be supported. + +The fan supervisor has a 7 bit counter register and a counter period of 1 +second. If the 7 bit counter overflows, the supervisor will automatically +switch to x8 mode to support a wider input range at the loss of +granularity. + +Sysfs entries +------------- + +The following attributes are supported. + +======================= ======================================================== +fan1_input Fan RPM. Assuming 2 pulses per revolution. +======================= ======================================================== diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 8dc28b26916e..d98c0a6860d1 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1479,6 +1479,16 @@ config SENSORS_RASPBERRYPI_HWMON This driver can also be built as a module. If so, the module will be called raspberrypi-hwmon. +config SENSORS_SL28CPLD + tristate "Kontron sl28cpld hardware monitoring driver" + depends on MFD_SL28CPLD || COMPILE_TEST + help + If you say yes here you get support for the fan supervisor of the + sl28cpld board management controller. + + This driver can also be built as a module. If so, the module + will be called sl28cpld-hwmon. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index a8f4b35b136b..dee8511f9348 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -159,6 +159,7 @@ obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o +obj-$(CONFIG_SENSORS_SL28CPLD) += sl28cpld-hwmon.o obj-$(CONFIG_SENSORS_SHT15) += sht15.o obj-$(CONFIG_SENSORS_SHT21) += sht21.o obj-$(CONFIG_SENSORS_SHT3x) += sht3x.o diff --git a/drivers/hwmon/sl28cpld-hwmon.c b/drivers/hwmon/sl28cpld-hwmon.c new file mode 100644 index 000000000000..e48f58ec5b9c --- /dev/null +++ b/drivers/hwmon/sl28cpld-hwmon.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld hardware monitoring driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define FAN_INPUT 0x00 +#define FAN_SCALE_X8 BIT(7) +#define FAN_VALUE_MASK GENMASK(6, 0) + +struct sl28cpld_hwmon { + struct regmap *regmap; + u32 offset; +}; + +static umode_t sl28cpld_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + return 0444; +} + +static int sl28cpld_hwmon_read(struct device *dev, + enum hwmon_sensor_types type, u32 attr, + int channel, long *input) +{ + struct sl28cpld_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_fan_input: + ret = regmap_read(hwmon->regmap, hwmon->offset + FAN_INPUT, + &value); + if (ret) + return ret; + /* + * The register has a 7 bit value and 1 bit which indicates the + * scale. If the MSB is set, then the lower 7 bit has to be + * multiplied by 8, to get the correct reading. + */ + if (value & FAN_SCALE_X8) + value = FIELD_GET(FAN_VALUE_MASK, value) << 3; + + /* + * The counter period is 1000ms and the sysfs specification + * says we should asssume 2 pulses per revolution. + */ + value *= 60 / 2; + + break; + default: + return -EOPNOTSUPP; + } + + *input = value; + return 0; +} + +static const u32 sl28cpld_hwmon_fan_config[] = { + HWMON_F_INPUT, + 0 +}; + +static const struct hwmon_channel_info sl28cpld_hwmon_fan = { + .type = hwmon_fan, + .config = sl28cpld_hwmon_fan_config, +}; + +static const struct hwmon_channel_info *sl28cpld_hwmon_info[] = { + &sl28cpld_hwmon_fan, + NULL +}; + +static const struct hwmon_ops sl28cpld_hwmon_ops = { + .is_visible = sl28cpld_hwmon_is_visible, + .read = sl28cpld_hwmon_read, +}; + +static const struct hwmon_chip_info sl28cpld_hwmon_chip_info = { + .ops = &sl28cpld_hwmon_ops, + .info = sl28cpld_hwmon_info, +}; + +static int sl28cpld_hwmon_probe(struct platform_device *pdev) +{ + struct sl28cpld_hwmon *hwmon; + struct device *hwmon_dev; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &hwmon->offset); + if (ret) + return -EINVAL; + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, + "sl28cpld_hwmon", hwmon, + &sl28cpld_hwmon_chip_info, NULL); + if (IS_ERR(hwmon_dev)) + dev_err(&pdev->dev, "failed to register as hwmon device"); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static const struct of_device_id sl28cpld_hwmon_of_match[] = { + { .compatible = "kontron,sl28cpld-fan" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_hwmon_of_match); + +static struct platform_driver sl28cpld_hwmon_driver = { + .probe = sl28cpld_hwmon_probe, + .driver = { + .name = "sl28cpld-fan", + .of_match_table = sl28cpld_hwmon_of_match, + }, +}; +module_platform_driver(sl28cpld_hwmon_driver); + +MODULE_DESCRIPTION("sl28cpld Hardware Monitoring Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); -- cgit 1.4.1 From 31c53962d65fb813eded2332b0fff60ffaaf2368 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 12 Aug 2020 14:29:03 +0200 Subject: mfd: Kconfig: Fix typo of 'individual' individul -> individual Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ed90eb5bdc83..4b918fdcc7c7 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -493,7 +493,7 @@ config MFD_HI6421_PMIC Add support for HiSilicon Hi6421 PMIC. Hi6421 includes multi- functions, such as regulators, RTC, codec, Coulomb counter, etc. This driver includes core APIs _only_. You have to select - individul components like voltage regulators under corresponding + individual components like voltage regulators under corresponding menus in order to enable them. We communicate with the Hi6421 via memory-mapped I/O. -- cgit 1.4.1 From d1264a075ed65d6b174a4742e69186125e66fd27 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 15 Aug 2020 18:56:10 +0200 Subject: mfd: rn5t618: Add a power supply subdevice The RN5T618 and RC5T619 both have a charger and a fuel gauge, so add a subdevice for it. According to drivers in the wild, things should be at least similar, but since it is not tested, add it only to the RC5T619. Signed-off-by: Andreas Kemnade Signed-off-by: Lee Jones --- drivers/mfd/rn5t618.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/rn5t618.c b/drivers/mfd/rn5t618.c index e25407ed3ad4..dc452df1f1bf 100644 --- a/drivers/mfd/rn5t618.c +++ b/drivers/mfd/rn5t618.c @@ -25,6 +25,7 @@ static const struct mfd_cell rn5t618_cells[] = { static const struct mfd_cell rc5t619_cells[] = { { .name = "rn5t618-adc" }, + { .name = "rn5t618-power" }, { .name = "rn5t618-regulator" }, { .name = "rc5t619-rtc" }, { .name = "rn5t618-wdt" }, -- cgit 1.4.1 From e26ea09b6e0995cb65760e44042e26d3e40452a7 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 28 Aug 2020 09:37:04 +0100 Subject: mfd: khadas-mcu: Fix randconfig 'unused-const-variable' warning When testing with !OF, the build system reports: >> drivers/mfd/khadas-mcu.c:125:34: warning: unused variable 'khadas_mcu_of_match' [-Wunused-const-variable] static const struct of_device_id khadas_mcu_of_match[] = { ^ Reported-by: kernel test robot Acked-by: Neil Armstrong Signed-off-by: Lee Jones --- drivers/mfd/khadas-mcu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/khadas-mcu.c b/drivers/mfd/khadas-mcu.c index 44d5bb462dab..f3d418810693 100644 --- a/drivers/mfd/khadas-mcu.c +++ b/drivers/mfd/khadas-mcu.c @@ -122,11 +122,13 @@ static int khadas_mcu_probe(struct i2c_client *client, return 0; } +#ifdef CONFIG_OF static const struct of_device_id khadas_mcu_of_match[] = { { .compatible = "khadas,mcu", }, {}, }; MODULE_DEVICE_TABLE(of, khadas_mcu_of_match); +#endif static struct i2c_driver khadas_mcu_driver = { .driver = { -- cgit 1.4.1 From ffa9cda9e62fe0afb5e7899985d615bdb36a2a03 Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Fri, 10 Jul 2020 01:12:27 +0200 Subject: dt-bindings: mfd: Add ENE KB3930 Embedded Controller binding Add binding document for the ENE KB3930 Embedded Controller. Signed-off-by: Lubomir Rintel Reviewed-by: Rob Herring Reviewed-by: Dmitry Osipenko Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/ene-kb3930.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ene-kb3930.yaml diff --git a/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml new file mode 100644 index 000000000000..074243c40891 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ene-kb3930.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ENE KB3930 Embedded Controller bindings + +description: | + This binding describes the ENE KB3930 Embedded Controller attached to an + I2C bus. + +maintainers: + - Lubomir Rintel + +properties: + compatible: + items: + - enum: + - dell,wyse-ariel-ec # Dell Wyse Ariel board (3020) + - const: ene,kb3930 + reg: + maxItems: 1 + + off-gpios: + description: GPIO used with the shutdown protocol on Ariel + maxItems: 2 + + system-power-controller: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@58 { + compatible = "dell,wyse-ariel-ec", "ene,kb3930"; + reg = <0x58>; + system-power-controller; + + off-gpios = <&gpio 126 GPIO_ACTIVE_HIGH>, + <&gpio 127 GPIO_ACTIVE_HIGH>; + }; + }; + +... -- cgit 1.4.1 From ede6b2d1dfc0d6a7b0b3161a2e911d464e28e0ad Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Fri, 10 Jul 2020 01:12:28 +0200 Subject: mfd: ene-kb3930: Add driver for ENE KB3930 Embedded Controller This driver provides access to the EC RAM of said embedded controller attached to the I2C bus as well as optionally supporting its slightly weird power-off/restart protocol. A particular implementation of the EC firmware can be identified by a model byte. If this driver identifies the Dell Ariel platform, it registers the appropriate cells. Signed-off-by: Lubomir Rintel Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 11 +++ drivers/mfd/Makefile | 1 + drivers/mfd/ene-kb3930.c | 212 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 224 insertions(+) create mode 100644 drivers/mfd/ene-kb3930.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 4b918fdcc7c7..e1d3bf77b245 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -398,6 +398,17 @@ config MFD_DLN2 etc. must be enabled in order to use the functionality of the device. +config MFD_ENE_KB3930 + tristate "ENE KB3930 Embedded Controller support" + depends on I2C + depends on MACH_MMP3_DT || COMPILE_TEST + select MFD_CORE + help + This adds support for the power-off functionality and access to + the registers that control LEDS and USB port power on ENE KB3930 + Embedded Controller. To use the LED functionality LEDS_ARIEL must + be enabled. + config MFD_EXYNOS_LPASS tristate "Samsung Exynos SoC Low Power Audio Subsystem" depends on ARCH_EXYNOS || COMPILE_TEST diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 78d24a3e7c9e..e6c7520ed129 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o obj-$(CONFIG_MFD_CROS_EC_DEV) += cros_ec_dev.o +obj-$(CONFIG_MFD_ENE_KB3930) += ene-kb3930.o obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o obj-$(CONFIG_MFD_GATEWORKS_GSC) += gateworks-gsc.o diff --git a/drivers/mfd/ene-kb3930.c b/drivers/mfd/ene-kb3930.c new file mode 100644 index 000000000000..1c32ff586816 --- /dev/null +++ b/drivers/mfd/ene-kb3930.c @@ -0,0 +1,212 @@ +// SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0-or-later +/* + * ENE KB3930 Embedded Controller Driver + * + * Copyright (C) 2020 Lubomir Rintel + */ + +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers that are multiplexing access to the EC RAM. */ +enum { + EC_DATA_IN = 0x00, + EC_RAM_OUT = 0x80, + EC_RAM_IN = 0x81, +}; + +/* EC RAM registers. */ +enum { + EC_MODEL = 0x30, + EC_VERSION_MAJ = 0x31, + EC_VERSION_MIN = 0x32, +}; + +struct kb3930 { + struct i2c_client *client; + struct regmap *ram_regmap; + struct gpio_descs *off_gpios; +}; + +struct kb3930 *kb3930_power_off; + +#define EC_GPIO_WAVE 0 +#define EC_GPIO_OFF_MODE 1 + +#define EC_OFF_MODE_REBOOT 0 +#define EC_OFF_MODE_POWER 1 + +static void kb3930_off(struct kb3930 *ddata, int off_mode) +{ + gpiod_direction_output(ddata->off_gpios->desc[EC_GPIO_OFF_MODE], + off_mode); + + /* + * This creates a 10 Hz wave on EC_GPIO_WAVE that signals a + * shutdown request to the EC. Once the EC detects it, it will + * proceed to turn the power off or reset the board depending on + * the value of EC_GPIO_OFF_MODE. + */ + while (1) { + mdelay(50); + gpiod_direction_output(ddata->off_gpios->desc[EC_GPIO_WAVE], 0); + mdelay(50); + gpiod_direction_output(ddata->off_gpios->desc[EC_GPIO_WAVE], 1); + } +} + +static int kb3930_restart(struct notifier_block *this, + unsigned long mode, void *cmd) +{ + kb3930_off(kb3930_power_off, EC_OFF_MODE_REBOOT); + return NOTIFY_DONE; +} + +static void kb3930_pm_power_off(void) +{ + kb3930_off(kb3930_power_off, EC_OFF_MODE_POWER); +} + +static struct notifier_block kb3930_restart_nb = { + .notifier_call = kb3930_restart, +}; + +static const struct mfd_cell ariel_ec_cells[] = { + { .name = "dell-wyse-ariel-led", }, + { .name = "dell-wyse-ariel-power", }, +}; + +static int kb3930_ec_ram_reg_write(void *context, unsigned int reg, + unsigned int val) +{ + struct kb3930 *ddata = context; + + return i2c_smbus_write_word_data(ddata->client, EC_RAM_OUT, + (val << 8) | reg); +} + +static int kb3930_ec_ram_reg_read(void *context, unsigned int reg, + unsigned int *val) +{ + struct kb3930 *ddata = context; + int ret; + + ret = i2c_smbus_write_word_data(ddata->client, EC_RAM_IN, reg); + if (ret < 0) + return ret; + + ret = i2c_smbus_read_word_data(ddata->client, EC_DATA_IN); + if (ret < 0) + return ret; + + *val = ret >> 8; + return 0; +} + +static const struct regmap_config kb3930_ram_regmap_config = { + .name = "ec_ram", + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, + .max_register = 0xff, + .reg_write = kb3930_ec_ram_reg_write, + .reg_read = kb3930_ec_ram_reg_read, + .fast_io = false, +}; + +static int kb3930_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device_node *np = dev->of_node; + struct kb3930 *ddata; + unsigned int model; + int ret; + + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + kb3930_power_off = ddata; + ddata->client = client; + i2c_set_clientdata(client, ddata); + + ddata->ram_regmap = devm_regmap_init(dev, NULL, ddata, + &kb3930_ram_regmap_config); + if (IS_ERR(ddata->ram_regmap)) + return PTR_ERR(ddata->ram_regmap); + + ret = regmap_read(ddata->ram_regmap, EC_MODEL, &model); + if (ret < 0) + return ret; + + /* Currently we only support the cells present on Dell Ariel model. */ + if (model != 'J') { + dev_err(dev, "unknown board model: %02x\n", model); + return -ENODEV; + } + + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, + ariel_ec_cells, + ARRAY_SIZE(ariel_ec_cells), + NULL, 0, NULL); + if (ret) + return ret; + + if (of_property_read_bool(np, "system-power-controller")) { + ddata->off_gpios = + devm_gpiod_get_array_optional(dev, "off", GPIOD_IN); + if (IS_ERR(ddata->off_gpios)) + return PTR_ERR(ddata->off_gpios); + if (ddata->off_gpios->ndescs < 2) { + dev_err(dev, "invalid off-gpios property\n"); + return -EINVAL; + } + } + + if (ddata->off_gpios) { + register_restart_handler(&kb3930_restart_nb); + if (!pm_power_off) + pm_power_off = kb3930_pm_power_off; + } + + return 0; +} + +static int kb3930_remove(struct i2c_client *client) +{ + struct kb3930 *ddata = i2c_get_clientdata(client); + + if (ddata->off_gpios) { + if (pm_power_off == kb3930_pm_power_off) + pm_power_off = NULL; + unregister_restart_handler(&kb3930_restart_nb); + } + kb3930_power_off = NULL; + + return 0; +} + +static const struct of_device_id kb3930_dt_ids[] = { + { .compatible = "ene,kb3930" }, + { } +}; +MODULE_DEVICE_TABLE(of, kb3930_dt_ids); + +static struct i2c_driver kb3930_driver = { + .probe_new = kb3930_probe, + .remove = kb3930_remove, + .driver = { + .name = "ene-kb3930", + .of_match_table = of_match_ptr(kb3930_dt_ids), + }, +}; +module_i2c_driver(kb3930_driver); + +MODULE_AUTHOR("Lubomir Rintel "); +MODULE_DESCRIPTION("ENE KB3930 Embedded Controller Driver"); +MODULE_LICENSE("Dual BSD/GPL"); -- cgit 1.4.1 From f104563fe08047b18cd3c96b41de0bc9c16739c7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:49:33 +0200 Subject: mfd: madera: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Acked-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/madera-core.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index 8a8d733fdce5..4ed6ad8ce002 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -369,19 +369,14 @@ EXPORT_SYMBOL_GPL(madera_of_match); static int madera_get_reset_gpio(struct madera *madera) { struct gpio_desc *reset; - int ret; if (madera->pdata.reset) return 0; reset = devm_gpiod_get_optional(madera->dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(reset)) { - ret = PTR_ERR(reset); - if (ret != -EPROBE_DEFER) - dev_err(madera->dev, "Failed to request /RESET: %d\n", - ret); - return ret; - } + if (IS_ERR(reset)) + return dev_err_probe(madera->dev, PTR_ERR(reset), + "Failed to request /RESET"); /* * A hard reset is needed for full reset of the chip. We allow running -- cgit 1.4.1 From 41c9c06c491a92e186e41ff64163fa74f08e15e6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:49:34 +0200 Subject: mfd: stmfx: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- drivers/mfd/stmfx.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c index 711979afd90a..5e680bfdf5c9 100644 --- a/drivers/mfd/stmfx.c +++ b/drivers/mfd/stmfx.c @@ -331,11 +331,9 @@ static int stmfx_chip_init(struct i2c_client *client) ret = PTR_ERR_OR_ZERO(stmfx->vdd); if (ret == -ENODEV) { stmfx->vdd = NULL; - } else if (ret == -EPROBE_DEFER) { - return ret; - } else if (ret) { - dev_err(&client->dev, "Failed to get VDD regulator: %d\n", ret); - return ret; + } else { + return dev_err_probe(&client->dev, ret, + "Failed to get VDD regulator\n"); } if (stmfx->vdd) { -- cgit 1.4.1 From 0f1b1b899521e3380a01f9f88a1bcb6163b7ee9f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:49:35 +0200 Subject: mfd: wcd934x: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- drivers/mfd/wcd934x.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/wcd934x.c b/drivers/mfd/wcd934x.c index da910302d51a..c274d733b656 100644 --- a/drivers/mfd/wcd934x.c +++ b/drivers/mfd/wcd934x.c @@ -219,12 +219,9 @@ static int wcd934x_slim_probe(struct slim_device *sdev) return -ENOMEM; ddata->irq = of_irq_get(np, 0); - if (ddata->irq < 0) { - if (ddata->irq != -EPROBE_DEFER) - dev_err(ddata->dev, "Failed to get IRQ: err = %d\n", - ddata->irq); - return ddata->irq; - } + if (ddata->irq < 0) + return dev_err_probe(ddata->dev, ddata->irq, + "Failed to get IRQ\n"); reset_gpio = of_get_named_gpio(np, "reset-gpios", 0); if (reset_gpio < 0) { -- cgit 1.4.1 From b6d213fb0b503683c0c6d33d80c85babd36bf0fc Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 26 Aug 2020 22:21:49 +0200 Subject: mfd: dm355evm_msp: Convert LEDs to GPIO descriptor table This converts the DaVinci DM355EVM LEDs to use GPIO descriptor look-ups. Cc: Sekhar Nori Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij Signed-off-by: Lee Jones --- drivers/mfd/dm355evm_msp.c | 76 ++++++++++++++++++++++++++++++---------------- 1 file changed, 50 insertions(+), 26 deletions(-) diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c index 151c36ce7343..54fb6cbd2aa0 100644 --- a/drivers/mfd/dm355evm_msp.c +++ b/drivers/mfd/dm355evm_msp.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -116,6 +117,54 @@ static const u8 msp_gpios[] = { MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */ }; +static struct gpio_led evm_leds[] = { + { .name = "dm355evm::ds14", + .default_trigger = "heartbeat", }, + { .name = "dm355evm::ds15", + .default_trigger = "mmc0", }, + { .name = "dm355evm::ds16", + /* could also be a CE-ATA drive */ + .default_trigger = "mmc1", }, + { .name = "dm355evm::ds17", + .default_trigger = "nand-disk", }, + { .name = "dm355evm::ds18", }, + { .name = "dm355evm::ds19", }, + { .name = "dm355evm::ds20", }, + { .name = "dm355evm::ds21", }, +}; + +static struct gpio_led_platform_data evm_led_data = { + .num_leds = ARRAY_SIZE(evm_leds), + .leds = evm_leds, +}; + +static struct gpiod_lookup_table evm_leds_gpio_table = { + .dev_id = "leds-gpio", + .table = { + /* + * These GPIOs are on the dm355evm_msp + * GPIO chip at index 0..7 + */ + GPIO_LOOKUP_IDX("dm355evm_msp", 0, NULL, + 0, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 1, NULL, + 1, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 2, NULL, + 2, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 3, NULL, + 3, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 4, NULL, + 4, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 5, NULL, + 5, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 6, NULL, + 6, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 7, NULL, + 7, GPIO_ACTIVE_LOW), + { }, + }, +}; + #define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3) #define MSP_GPIO_MASK(offset) BIT(msp_gpios[(offset)] & 0x07) @@ -260,32 +309,7 @@ static int add_children(struct i2c_client *client) /* LED output */ if (msp_has_leds()) { -#define GPIO_LED(l) .name = l, .active_low = true - static struct gpio_led evm_leds[] = { - { GPIO_LED("dm355evm::ds14"), - .default_trigger = "heartbeat", }, - { GPIO_LED("dm355evm::ds15"), - .default_trigger = "mmc0", }, - { GPIO_LED("dm355evm::ds16"), - /* could also be a CE-ATA drive */ - .default_trigger = "mmc1", }, - { GPIO_LED("dm355evm::ds17"), - .default_trigger = "nand-disk", }, - { GPIO_LED("dm355evm::ds18"), }, - { GPIO_LED("dm355evm::ds19"), }, - { GPIO_LED("dm355evm::ds20"), }, - { GPIO_LED("dm355evm::ds21"), }, - }; -#undef GPIO_LED - - struct gpio_led_platform_data evm_led_data = { - .num_leds = ARRAY_SIZE(evm_leds), - .leds = evm_leds, - }; - - for (i = 0; i < ARRAY_SIZE(evm_leds); i++) - evm_leds[i].gpio = i + dm355evm_msp_gpio.base; - + gpiod_add_lookup_table(&evm_leds_gpio_table); /* NOTE: these are the only fully programmable LEDs * on the board, since GPIO-61/ds22 (and many signals * going to DC7) must be used for AEMIF address lines -- cgit 1.4.1 From 5f039fa742b6d8b4bbb7eb1a91c0dd251f03712d Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 21 Aug 2020 17:25:09 +0300 Subject: mfd: intel-lpss: Add device IDs for UART ports for Lakefield Add PCI IDs for Lakefield to the list of supported UARTs. Cc: Jarkko Nikula Cc: Mika Westerberg Cc: "Ravi V. Shankar" Signed-off-by: Ricardo Neri Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss-pci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 9a58032f818a..2d7c588ef1ed 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -293,6 +293,10 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, + /* LKF */ + { PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x98c7), (kernel_ulong_t)&bxt_uart_info }, /* SPT-LP */ { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info }, -- cgit 1.4.1 From a75bfc824a2d33f57ebdc003bfe6b7a9e11e9cb9 Mon Sep 17 00:00:00 2001 From: Baolin Wang Date: Tue, 18 Aug 2020 11:41:58 +0800 Subject: mfd: sprd: Add wakeup capability for PMIC IRQ When changing to use suspend-to-idle to save power, the PMIC irq can not wakeup the system due to lack of wakeup capability, which will cause the sub-irqs (such as power key) of the PMIC can not wake up the system. Thus we can add the wakeup capability for PMIC irq to solve this issue, as well as removing the IRQF_NO_SUSPEND flag to allow PMIC irq to be a wakeup source. Reported-by: Chunyan Zhang Signed-off-by: Baolin Wang Tested-by: Chunyan Zhang Signed-off-by: Lee Jones --- drivers/mfd/sprd-sc27xx-spi.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/sprd-sc27xx-spi.c b/drivers/mfd/sprd-sc27xx-spi.c index f8a8b918c60d..6b7956604a0f 100644 --- a/drivers/mfd/sprd-sc27xx-spi.c +++ b/drivers/mfd/sprd-sc27xx-spi.c @@ -189,7 +189,7 @@ static int sprd_pmic_probe(struct spi_device *spi) ddata->irqs[i].mask = BIT(i); ret = devm_regmap_add_irq_chip(&spi->dev, ddata->regmap, ddata->irq, - IRQF_ONESHOT | IRQF_NO_SUSPEND, 0, + IRQF_ONESHOT, 0, &ddata->irq_chip, &ddata->irq_data); if (ret) { dev_err(&spi->dev, "Failed to add PMIC irq chip %d\n", ret); @@ -202,9 +202,34 @@ static int sprd_pmic_probe(struct spi_device *spi) return ret; } + device_init_wakeup(&spi->dev, true); return 0; } +#ifdef CONFIG_PM_SLEEP +static int sprd_pmic_suspend(struct device *dev) +{ + struct sprd_pmic *ddata = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + enable_irq_wake(ddata->irq); + + return 0; +} + +static int sprd_pmic_resume(struct device *dev) +{ + struct sprd_pmic *ddata = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + disable_irq_wake(ddata->irq); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(sprd_pmic_pm_ops, sprd_pmic_suspend, sprd_pmic_resume); + static const struct of_device_id sprd_pmic_match[] = { { .compatible = "sprd,sc2731", .data = &sc2731_data }, {}, @@ -215,6 +240,7 @@ static struct spi_driver sprd_pmic_driver = { .driver = { .name = "sc27xx-pmic", .of_match_table = sprd_pmic_match, + .pm = &sprd_pmic_pm_ops, }, .probe = sprd_pmic_probe, }; -- cgit 1.4.1 From a09813283981f9e9ceefd7d6a1edb8f391aad00e Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Sat, 5 Sep 2020 20:58:03 +0200 Subject: dt-bindings: mfd: ab8500: Remove weird Unicode characters MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are stray Unicode quotation marks (U+201C DOUBLE TURNED COMMA QUOTATION MARK) in the file. Remove them, as they don't serve a purpose. Signed-off-by: Jonathan Neuschäfer Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/ab8500.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/ab8500.txt b/Documentation/devicetree/bindings/mfd/ab8500.txt index 5c6eabeed341..d2a6e835c257 100644 --- a/Documentation/devicetree/bindings/mfd/ab8500.txt +++ b/Documentation/devicetree/bindings/mfd/ab8500.txt @@ -31,8 +31,8 @@ ab8500-btemp : : vtvout : Battery Temperature : BAT_CTRL_INDB : : Battery Removal Indicator : BTEMP_LOW : : Btemp < BtempLow, if battery temperature is lower than -10°C : BTEMP_LOW_MEDIUM : : BtempLow < Btemp < BtempMedium,if battery temperature is between -10 and 0°C - : BTEMP_MEDIUM_HIGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and“MaxTemp - : BTEMP_HIGH : : Btemp > BtempHigh, if battery temperature is higher than “MaxTemp + : BTEMP_MEDIUM_HIGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and MaxTemp + : BTEMP_HIGH : : Btemp > BtempHigh, if battery temperature is higher than MaxTemp ab8500-charger : : vddadc : Charger interface : MAIN_CH_UNPLUG_DET : : main charger unplug detection management (not in 8505) : MAIN_CHARGE_PLUG_DET : : main charger plug detection management (not in 8505) -- cgit 1.4.1 From 18394297562a235d41c2b410188533ea78bd0d3e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 2 Sep 2020 18:14:51 +0200 Subject: dt-bindings: mfd: syscon: Merge Samsung Exynos Sysreg bindings The Samsung Exynos System Registers (Sysreg) bindings are quite simple - just additional compatible to the syscon. They do not have any value so merge them into generic MFD syscon bindings. Suggested-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sylwester Nawrocki Signed-off-by: Lee Jones --- .../devicetree/bindings/arm/samsung/sysreg.yaml | 45 ---------------------- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 + 2 files changed, 2 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/samsung/sysreg.yaml diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml b/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml deleted file mode 100644 index 3b7811804cb4..000000000000 --- a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml +++ /dev/null @@ -1,45 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/samsung/sysreg.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Samsung S5P/Exynos SoC series System Registers (SYSREG) - -maintainers: - - Krzysztof Kozlowski - -# Custom select to avoid matching all nodes with 'syscon' -select: - properties: - compatible: - contains: - enum: - - samsung,exynos4-sysreg - - samsung,exynos5-sysreg - required: - - compatible - -properties: - compatible: - allOf: - - items: - - enum: - - samsung,exynos4-sysreg - - samsung,exynos5-sysreg - - const: syscon - - reg: - maxItems: 1 - -examples: - - | - syscon@10010000 { - compatible = "samsung,exynos4-sysreg", "syscon"; - reg = <0x10010000 0x400>; - }; - - syscon@10050000 { - compatible = "samsung,exynos5-sysreg", "syscon"; - reg = <0x10050000 0x5000>; - }; diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 049ec2ffc7f9..a34c9e2ab1ca 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -40,6 +40,8 @@ properties: - allwinner,sun50i-a64-system-controller - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep + - samsung,exynos4-sysreg + - samsung,exynos5-sysreg - const: syscon -- cgit 1.4.1 From 05027df1b94fcb9e23e1af170733a570f5a90356 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 2 Sep 2020 18:14:52 +0200 Subject: dt-bindings: mfd: syscon: Document Exynos3 and Exynos5433 compatibles Document Samsung Exynos3 and Exynos5433 compatibles for system registers. Reviewed-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index a34c9e2ab1ca..0f21943dea28 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -40,8 +40,10 @@ properties: - allwinner,sun50i-a64-system-controller - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep + - samsung,exynos3-sysreg - samsung,exynos4-sysreg - samsung,exynos5-sysreg + - samsung,exynos5433-sysreg - const: syscon -- cgit 1.4.1 From 529a1101212a785c5df92c314b0e718287150c3b Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Thu, 3 Sep 2020 17:02:37 +0100 Subject: mfd: syscon: Don't free allocated name for regmap_config The name allocated for the regmap_config structure is freed pretty early, right after the registration of the MMIO region. Unfortunately, that doesn't follow the life cycle that debugfs expects, as it can access the name field long after the free has occurred. Move the free on the error path, and keep it forever otherwise. Fixes: e15d7f2b81d2 ("mfd: syscon: Use a unique name with regmap_config") Signed-off-by: Marc Zyngier Signed-off-by: Lee Jones --- drivers/mfd/syscon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index 75859e492984..7a660411c562 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -108,7 +108,6 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_clk) syscon_config.max_register = resource_size(&res) - reg_io_width; regmap = regmap_init_mmio(NULL, base, &syscon_config); - kfree(syscon_config.name); if (IS_ERR(regmap)) { pr_err("regmap init failed\n"); ret = PTR_ERR(regmap); @@ -145,6 +144,7 @@ err_clk: regmap_exit(regmap); err_regmap: iounmap(base); + kfree(syscon_config.name); err_map: kfree(syscon); return ERR_PTR(ret); -- cgit 1.4.1 From 8ce24f8967df2836b4557a23e74dc4bb098249f1 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 11 Sep 2020 14:33:26 +0300 Subject: mfd: sm501: Fix leaks in probe() This code should clean up if sm501_init_dev() fails. Fixes: b6d6454fdb66 ("[PATCH] mfd: SM501 core driver") Signed-off-by: Dan Carpenter Signed-off-by: Lee Jones --- drivers/mfd/sm501.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index ccd62b963952..6d2f4a0a901d 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1415,8 +1415,14 @@ static int sm501_plat_probe(struct platform_device *dev) goto err_claim; } - return sm501_init_dev(sm); + ret = sm501_init_dev(sm); + if (ret) + goto err_unmap; + + return 0; + err_unmap: + iounmap(sm->regs); err_claim: release_mem_region(sm->io_res->start, 0x100); err_res: -- cgit 1.4.1 From d38eac299151e4715c3b22e0253126440fa513b4 Mon Sep 17 00:00:00 2001 From: YueHaibing Date: Mon, 14 Sep 2020 22:25:18 +0800 Subject: mfd: mt6360: Remove unused include This file does not make use of it. Reported-by: Hulk Robot Signed-off-by: YueHaibing Signed-off-by: Lee Jones --- drivers/mfd/mt6360-core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mfd/mt6360-core.c b/drivers/mfd/mt6360-core.c index e9cacc27d980..4661c1b29a72 100644 --- a/drivers/mfd/mt6360-core.c +++ b/drivers/mfd/mt6360-core.c @@ -13,7 +13,6 @@ #include #include #include -#include #include -- cgit 1.4.1 From 326fa4399f6723201c10d77d3a18675915c56097 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Wed, 2 Sep 2020 16:22:57 +0200 Subject: dt-bindings: mfd: lp87565: Convert to yaml Also apply a few smaller improvements: - document that the only possible I2C slave address is 0x60 as per the datasheet and fix the second example accordingly - The definition of "xxx-in-supply" was generic, thus define in detail the possible cases for each chip variant - remove "MFD driver" from the title as it is implementation specific - replace "PMIC" with "buck converter" in title as it is more informative Signed-off-by: Luca Ceresoli Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/lp87565.txt | 79 ---------------- .../devicetree/bindings/mfd/ti,lp87561-q1.yaml | 83 +++++++++++++++++ .../devicetree/bindings/mfd/ti,lp87565-q1.yaml | 101 +++++++++++++++++++++ 3 files changed, 184 insertions(+), 79 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/lp87565.txt create mode 100644 Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml create mode 100644 Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml diff --git a/Documentation/devicetree/bindings/mfd/lp87565.txt b/Documentation/devicetree/bindings/mfd/lp87565.txt deleted file mode 100644 index 41671e0dc26b..000000000000 --- a/Documentation/devicetree/bindings/mfd/lp87565.txt +++ /dev/null @@ -1,79 +0,0 @@ -TI LP87565 PMIC MFD driver - -Required properties: - - compatible: "ti,lp87565", "ti,lp87565-q1" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx should match - the supply_name populated in driver. -Example: - -lp87565_pmic: pmic@60 { - compatible = "ti,lp87565-q1"; - reg = <0x60>; - gpio-controller; - #gpio-cells = <2>; - - buck10-in-supply = <&vsys_3v3>; - buck23-in-supply = <&vsys_3v3>; - - regulators: regulators { - buck10_reg: buck10 { - /* VDD_MPU */ - regulator-name = "buck10"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-always-on; - regulator-boot-on; - }; - - buck23_reg: buck23 { - /* VDD_GPU */ - regulator-name = "buck23"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-boot-on; - regulator-always-on; - }; - }; -}; - -TI LP87561 PMIC: - -This is a single output 4-phase regulator configuration - -Required properties: - - compatible: "ti,lp87561-q1" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx should match - the supply_name populated in driver. -Example: - -lp87561_pmic: pmic@62 { - compatible = "ti,lp87561-q1"; - reg = <0x62>; - gpio-controller; - #gpio-cells = <2>; - - buck3210-in-supply = <&vsys_3v3>; - - regulators: regulators { - buck3210_reg: buck3210 { - /* VDD_CORE */ - regulator-name = "buck3210"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-always-on; - regulator-boot-on; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml new file mode 100644 index 000000000000..a7e57c0913e1 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87561-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87561-Q1 single 4-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + const: ti,lp87561-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + buck3210-in-supply: + description: + Voltage regulator supply for all the four BUCK converters. + + regulators: + type: object + + properties: + buck3210: + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck3210 + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck3210-in-supply + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87561-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck3210-in-supply = <&vsys_3v3>; + + regulators { + buck3210_reg: buck3210 { + /* VDD_CORE */ + regulator-name = "buck3210"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml new file mode 100644 index 000000000000..1da6d6a958c9 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87565-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87565-Q1 / LP87565 dual 2-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + oneOf: + - const: ti,lp87565 + - const: ti,lp87565-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + buck10-in-supply: + description: + Voltage regulator supply for BUCK0 and BUCK1 converters. + + buck23-in-supply: + description: + Voltage regulator supply for BUCK2 and BUCK3 converters. + + regulators: + type: object + + patternProperties: + "^buck(10|23)$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck10 + - buck23 + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck10-in-supply + - buck23-in-supply + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87565-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck10-in-supply = <&vsys_3v3>; + buck23-in-supply = <&vsys_3v3>; + + regulators { + buck10_reg: buck10 { + /* VDD_MPU */ + regulator-name = "buck10"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + buck23_reg: buck23 { + /* VDD_GPU */ + regulator-name = "buck23"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; + +... -- cgit 1.4.1 From f9c6785c0c5ecc7c09e38550c785184958a67201 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Wed, 2 Sep 2020 16:22:58 +0200 Subject: dt-bindings: mfd: Add LP87524-Q1 Add the LP87524-Q1 to the bindings along with an example. This is a variant of the LP87565-Q1 and LP87561-Q1 chips which already have bindings. Signed-off-by: Luca Ceresoli Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/ti,lp87524-q1.yaml | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml new file mode 100644 index 000000000000..c4fc5345d38d --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87524-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87524-Q1 four 1-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + const: ti,lp87524-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + regulators: + type: object + + patternProperties: + "^buck[0123]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck0 + - buck1 + - buck2 + - buck3 + + additionalProperties: false + +patternProperties: + "^buck[0123]-in-supply$": + description: Voltage regulator supply for each BUCK converter + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck0-in-supply + - buck1-in-supply + - buck2-in-supply + - buck3-in-supply + - regulators + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87524-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck0-in-supply = <&vdd_5v0>; + buck1-in-supply = <&vdd_5v0>; + buck2-in-supply = <&vdd_5v0>; + buck3-in-supply = <&vdd_5v0>; + + regulators { + buck0_reg: buck0 { + regulator-name = "buck0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + buck1_reg: buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "buck3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + }; + }; + }; + +... -- cgit 1.4.1 From 4b6ec08fd21ee3179cbfccf3605ad13d9f38b623 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Wed, 2 Sep 2020 16:22:59 +0200 Subject: mfd: lp87565: Add LP87524-Q1 variant Add support for the LP87524B/J/P-Q1 Four 4-MHz Buck Converter. This is a variant of the LP87565 having 4 single-phase outputs and up to 10 A of total output current. Signed-off-by: Luca Ceresoli Signed-off-by: Lee Jones --- drivers/mfd/lp87565.c | 4 ++++ include/linux/mfd/lp87565.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/mfd/lp87565.c b/drivers/mfd/lp87565.c index 2268be9113f1..9c21483d9653 100644 --- a/drivers/mfd/lp87565.c +++ b/drivers/mfd/lp87565.c @@ -26,6 +26,10 @@ static const struct mfd_cell lp87565_cells[] = { static const struct of_device_id of_lp87565_match_table[] = { { .compatible = "ti,lp87565", }, + { + .compatible = "ti,lp87524-q1", + .data = (void *)LP87565_DEVICE_TYPE_LP87524_Q1, + }, { .compatible = "ti,lp87565-q1", .data = (void *)LP87565_DEVICE_TYPE_LP87565_Q1, diff --git a/include/linux/mfd/lp87565.h b/include/linux/mfd/lp87565.h index 43716aca46fa..d44ddfb6bb63 100644 --- a/include/linux/mfd/lp87565.h +++ b/include/linux/mfd/lp87565.h @@ -14,6 +14,7 @@ enum lp87565_device_type { LP87565_DEVICE_TYPE_UNKNOWN = 0, + LP87565_DEVICE_TYPE_LP87524_Q1, LP87565_DEVICE_TYPE_LP87561_Q1, LP87565_DEVICE_TYPE_LP87565_Q1, }; -- cgit 1.4.1 From 876611c493b10cbb59e0e2143d3e744d0442de63 Mon Sep 17 00:00:00 2001 From: Xu Yilun Date: Tue, 15 Sep 2020 11:44:21 +0800 Subject: mfd: intel-m10-bmc: Add Intel MAX 10 BMC chip support for Intel FPGA PAC This patch implements the basic functions of the BMC chip for some Intel FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the Intel MAX 10 CPLD. This BMC chip is connected to the FPGA by a SPI bus. To provide direct register access from the FPGA, the "SPI slave to Avalon Master Bridge" (spi-avmm) IP is integrated in the chip. It converts encoded streams of bytes from the host to the internal register read/write on the Avalon bus. So This driver uses the regmap-spi-avmm for register accessing. Signed-off-by: Xu Yilun Signed-off-by: Wu Hao Signed-off-by: Matthew Gerlach Signed-off-by: Russ Weight Reviewed-by: Tom Rix Signed-off-by: Lee Jones --- .../ABI/testing/sysfs-driver-intel-m10-bmc | 15 ++ drivers/mfd/Kconfig | 13 ++ drivers/mfd/Makefile | 1 + drivers/mfd/intel-m10-bmc.c | 164 +++++++++++++++++++++ include/linux/mfd/intel-m10-bmc.h | 65 ++++++++ 5 files changed, 258 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc create mode 100644 drivers/mfd/intel-m10-bmc.c create mode 100644 include/linux/mfd/intel-m10-bmc.h diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc new file mode 100644 index 000000000000..979a2d62513f --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc @@ -0,0 +1,15 @@ +What: /sys/bus/spi/devices/.../bmc_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read only. Returns the hardware build version of Intel + MAX10 BMC chip. + Format: "0x%x". + +What: /sys/bus/spi/devices/.../bmcfw_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read only. Returns the firmware version of Intel MAX10 + BMC chip. + Format: "0x%x". diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index e1d3bf77b245..2ba269429e25 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2151,5 +2151,18 @@ config SGI_MFD_IOC3 If you have an SGI Origin, Octane, or a PCI IOC3 card, then say Y. Otherwise say N. +config MFD_INTEL_M10_BMC + tristate "Intel MAX 10 Board Management Controller" + depends on SPI_MASTER + select REGMAP_SPI_AVMM + select MFD_CORE + help + Support for the Intel MAX 10 board management controller using the + SPI interface. + + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the functionality + of the device. + endmenu endif diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index e6c7520ed129..1780019d2474 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -266,3 +266,4 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o +obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c new file mode 100644 index 000000000000..b84579b7b4f0 --- /dev/null +++ b/drivers/mfd/intel-m10-bmc.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel MAX 10 Board Management Controller chip + * + * Copyright (C) 2018-2020 Intel Corporation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +enum m10bmc_type { + M10_N3000, +}; + +static struct mfd_cell m10bmc_pacn3000_subdevs[] = { + { .name = "n3000bmc-hwmon" }, + { .name = "n3000bmc-retimer" }, + { .name = "n3000bmc-secure" }, +}; + +static struct regmap_config intel_m10bmc_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = M10BMC_MEM_END, +}; + +static ssize_t bmc_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct intel_m10bmc *ddata = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = m10bmc_sys_read(ddata, M10BMC_BUILD_VER, &val); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", val); +} +static DEVICE_ATTR_RO(bmc_version); + +static ssize_t bmcfw_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct intel_m10bmc *ddata = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = m10bmc_sys_read(ddata, NIOS2_FW_VERSION, &val); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", val); +} +static DEVICE_ATTR_RO(bmcfw_version); + +static struct attribute *m10bmc_attrs[] = { + &dev_attr_bmc_version.attr, + &dev_attr_bmcfw_version.attr, + NULL, +}; +ATTRIBUTE_GROUPS(m10bmc); + +static int check_m10bmc_version(struct intel_m10bmc *ddata) +{ + unsigned int v; + int ret; + + /* + * This check is to filter out the very old legacy BMC versions, + * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio + * registers. In the old BMC chips, the BMC version info is stored + * in this old version register (M10BMC_LEGACY_SYS_BASE + + * M10BMC_BUILD_VER), so its read out value would have not been + * LEGACY_INVALID (0xffffffff). But in new BMC chips that the + * driver supports, the value of this register should be + * LEGACY_INVALID. + */ + ret = m10bmc_raw_read(ddata, + M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v); + if (ret) + return -ENODEV; + + if (v != M10BMC_VER_LEGACY_INVALID) { + dev_err(ddata->dev, "bad version M10BMC detected\n"); + return -ENODEV; + } + + return 0; +} + +static int intel_m10_bmc_spi_probe(struct spi_device *spi) +{ + const struct spi_device_id *id = spi_get_device_id(spi); + struct device *dev = &spi->dev; + struct mfd_cell *cells; + struct intel_m10bmc *ddata; + int ret, n_cell; + + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + ddata->dev = dev; + + ddata->regmap = + devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config); + if (IS_ERR(ddata->regmap)) { + ret = PTR_ERR(ddata->regmap); + dev_err(dev, "Failed to allocate regmap: %d\n", ret); + return ret; + } + + spi_set_drvdata(spi, ddata); + + ret = check_m10bmc_version(ddata); + if (ret) { + dev_err(dev, "Failed to identify m10bmc hardware\n"); + return ret; + } + + switch (id->driver_data) { + case M10_N3000: + cells = m10bmc_pacn3000_subdevs; + n_cell = ARRAY_SIZE(m10bmc_pacn3000_subdevs); + break; + default: + return -ENODEV; + } + + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, n_cell, + NULL, 0, NULL); + if (ret) + dev_err(dev, "Failed to register sub-devices: %d\n", ret); + + return ret; +} + +static const struct spi_device_id m10bmc_spi_id[] = { + { "m10-n3000", M10_N3000 }, + { } +}; +MODULE_DEVICE_TABLE(spi, m10bmc_spi_id); + +static struct spi_driver intel_m10bmc_spi_driver = { + .driver = { + .name = "intel-m10-bmc", + .dev_groups = m10bmc_groups, + }, + .probe = intel_m10_bmc_spi_probe, + .id_table = m10bmc_spi_id, +}; +module_spi_driver(intel_m10bmc_spi_driver); + +MODULE_DESCRIPTION("Intel MAX 10 BMC Device Driver"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("spi:intel-m10-bmc"); diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h new file mode 100644 index 000000000000..c8ef2f1654a4 --- /dev/null +++ b/include/linux/mfd/intel-m10-bmc.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Intel MAX 10 Board Management Controller chip. + * + * Copyright (C) 2018-2020 Intel Corporation, Inc. + */ +#ifndef __MFD_INTEL_M10_BMC_H +#define __MFD_INTEL_M10_BMC_H + +#include + +#define M10BMC_LEGACY_SYS_BASE 0x300400 +#define M10BMC_SYS_BASE 0x300800 +#define M10BMC_MEM_END 0x200000fc + +/* Register offset of system registers */ +#define NIOS2_FW_VERSION 0x0 +#define M10BMC_TEST_REG 0x3c +#define M10BMC_BUILD_VER 0x68 +#define M10BMC_VER_MAJOR_MSK GENMASK(23, 16) +#define M10BMC_VER_PCB_INFO_MSK GENMASK(31, 24) +#define M10BMC_VER_LEGACY_INVALID 0xffffffff + +/** + * struct intel_m10bmc - Intel MAX 10 BMC parent driver data structure + * @dev: this device + * @regmap: the regmap used to access registers by m10bmc itself + */ +struct intel_m10bmc { + struct device *dev; + struct regmap *regmap; +}; + +/* + * register access helper functions. + * + * m10bmc_raw_read - read m10bmc register per addr + * m10bmc_sys_read - read m10bmc system register per offset + */ +static inline int +m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr, + unsigned int *val) +{ + int ret; + + ret = regmap_read(m10bmc->regmap, addr, val); + if (ret) + dev_err(m10bmc->dev, "fail to read raw reg %x: %d\n", + addr, ret); + + return ret; +} + +/* + * The base of the system registers could be configured by HW developers, and + * in HW SPEC, the base is not added to the addresses of the system registers. + * + * This macro helps to simplify the accessing of the system registers. And if + * the base is reconfigured in HW, SW developers could simply change the + * M10BMC_SYS_BASE accordingly. + */ +#define m10bmc_sys_read(m10bmc, offset, val) \ + m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val) + +#endif /* __MFD_INTEL_M10_BMC_H */ -- cgit 1.4.1 From e8299c7313af857254bc4304bc37482e9b952481 Mon Sep 17 00:00:00 2001 From: Michael Brunner Date: Thu, 20 Aug 2020 15:39:14 +0000 Subject: mfd: Add ACPI support to Kontron PLD driver Recent Kontron COMe modules identify the PLD device using the hardware id KEM0001 in the ACPI table. This patch adds support for probing the device using the HID and also retrieving the resources. As this is not available for all products, the DMI based detection still needs to be around for older systems. It is executed if no matching ACPI HID is found during registering the platform driver or no specific device id is forced. If a device is detected using ACPI and no resource information is available, the default io resource is used. Forcing a device id with the force_device_id parameter and therefore manually generating a platform device takes precedence over ACPI during probing. Signed-off-by: Michael Brunner Signed-off-by: Lee Jones --- drivers/mfd/kempld-core.c | 115 +++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 109 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 52bec01149e5..1dfe556df038 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -13,6 +13,7 @@ #include #include #include +#include #define MAX_ID_LEN 4 static char force_device_id[MAX_ID_LEN + 1] = ""; @@ -124,6 +125,7 @@ static const struct kempld_platform_data kempld_platform_data_generic = { }; static struct platform_device *kempld_pdev; +static bool kempld_acpi_mode; static int kempld_create_platform_device(const struct dmi_system_id *id) { @@ -426,13 +428,93 @@ static int kempld_detect_device(struct kempld_device_data *pld) return ret; } +#ifdef CONFIG_ACPI +static int kempld_get_acpi_data(struct platform_device *pdev) +{ + struct list_head resource_list; + struct resource *resources; + struct resource_entry *rentry; + struct device *dev = &pdev->dev; + struct acpi_device *acpi_dev = ACPI_COMPANION(dev); + const struct kempld_platform_data *pdata; + int ret; + int count; + + pdata = acpi_device_get_match_data(dev); + ret = platform_device_add_data(pdev, pdata, + sizeof(struct kempld_platform_data)); + if (ret) + return ret; + + INIT_LIST_HEAD(&resource_list); + ret = acpi_dev_get_resources(acpi_dev, &resource_list, NULL, NULL); + if (ret < 0) + goto out; + + count = ret; + + if (count == 0) { + ret = platform_device_add_resources(pdev, pdata->ioresource, 1); + goto out; + } + + resources = devm_kcalloc(&acpi_dev->dev, count, sizeof(*resources), + GFP_KERNEL); + if (!resources) { + ret = -ENOMEM; + goto out; + } + + count = 0; + list_for_each_entry(rentry, &resource_list, node) { + memcpy(&resources[count], rentry->res, + sizeof(*resources)); + count++; + } + ret = platform_device_add_resources(pdev, resources, count); + +out: + acpi_dev_free_resource_list(&resource_list); + + return ret; +} +#else +static int kempld_get_acpi_data(struct platform_device *pdev) +{ + return -ENODEV; +} +#endif /* CONFIG_ACPI */ + static int kempld_probe(struct platform_device *pdev) { - const struct kempld_platform_data *pdata = - dev_get_platdata(&pdev->dev); + const struct kempld_platform_data *pdata; struct device *dev = &pdev->dev; struct kempld_device_data *pld; struct resource *ioport; + int ret; + + if (kempld_pdev == NULL) { + /* + * No kempld_pdev device has been registered in kempld_init, + * so we seem to be probing an ACPI platform device. + */ + ret = kempld_get_acpi_data(pdev); + if (ret) + return ret; + + kempld_acpi_mode = true; + } else if (kempld_pdev != pdev) { + /* + * The platform device we are probing is not the one we + * registered in kempld_init using the DMI table, so this one + * comes from ACPI. + * As we can only probe one - abort here and use the DMI + * based one instead. + */ + dev_notice(dev, "platform device exists - not using ACPI\n"); + return -ENODEV; + } + pdata = dev_get_platdata(dev); pld = devm_kzalloc(dev, sizeof(*pld), GFP_KERNEL); if (!pld) @@ -471,9 +553,17 @@ static int kempld_remove(struct platform_device *pdev) return 0; } +static const struct acpi_device_id kempld_acpi_table[] = { + { "KEM0001", (kernel_ulong_t)&kempld_platform_data_generic }, + {} +}; +MODULE_DEVICE_TABLE(acpi, kempld_acpi_table); + static struct platform_driver kempld_driver = { .driver = { .name = "kempld", + .acpi_match_table = ACPI_PTR(kempld_acpi_table), + .probe_type = PROBE_FORCE_SYNCHRONOUS, }, .probe = kempld_probe, .remove = kempld_remove, @@ -792,6 +882,7 @@ MODULE_DEVICE_TABLE(dmi, kempld_dmi_table); static int __init kempld_init(void) { const struct dmi_system_id *id; + int ret; if (force_device_id[0]) { for (id = kempld_dmi_table; @@ -801,12 +892,24 @@ static int __init kempld_init(void) break; if (id->matches[0].slot == DMI_NONE) return -ENODEV; - } else { - if (!dmi_check_system(kempld_dmi_table)) - return -ENODEV; } - return platform_driver_register(&kempld_driver); + ret = platform_driver_register(&kempld_driver); + if (ret) + return ret; + + /* + * With synchronous probing the device should already be probed now. + * If no device id is forced and also no ACPI definition for the + * device was found, scan DMI table as fallback. + * + * If drivers_autoprobing is disabled and the device is found here, + * only that device can be bound manually later. + */ + if (!kempld_pdev && !kempld_acpi_mode) + dmi_check_system(kempld_dmi_table); + + return 0; } static void __exit kempld_exit(void) -- cgit 1.4.1 From b727db94e3ba451a6941b0f8d8714f9f260ab110 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 17 Sep 2020 20:56:13 +0200 Subject: dt-bindings: mfd: Correct interrupt flags in examples GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski Acked-by: Matti Vaittinen # for BD70528 Acked-by: Tim Harvey # for gateworks-gsc.yaml Acked-by: Rob Herring Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/act8945a.txt | 2 +- Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml | 3 ++- Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/act8945a.txt b/Documentation/devicetree/bindings/mfd/act8945a.txt index e6f168db6c72..5ca75d888b4a 100644 --- a/Documentation/devicetree/bindings/mfd/act8945a.txt +++ b/Documentation/devicetree/bindings/mfd/act8945a.txt @@ -71,7 +71,7 @@ Example: pinctrl-names = "default"; pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; interrupt-parent = <&pioA>; - interrupts = <45 GPIO_ACTIVE_LOW>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml index 9b6eb50606e8..e541eb0d02ed 100644 --- a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml +++ b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml @@ -147,6 +147,7 @@ required: examples: - | #include + #include i2c { #address-cells = <1>; #size-cells = <0>; @@ -155,7 +156,7 @@ examples: compatible = "gw,gsc"; reg = <0x20>; interrupt-parent = <&gpio1>; - interrupts = <4 GPIO_ACTIVE_LOW>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt index c3c02ce73cde..386eec06cf08 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt @@ -39,7 +39,7 @@ pmic: pmic@4b { compatible = "rohm,bd70528"; reg = <0x4b>; interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_LOW>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; clocks = <&osc 0>; #clock-cells = <0>; clock-output-names = "bd70528-32k-out"; -- cgit 1.4.1 From 1586d3a964c9b273ca982b750f757fbedcb57afb Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Thu, 17 Sep 2020 21:31:40 +0200 Subject: mfd: asic3: Build if COMPILE_TEST=y MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Build this driver on another platforms if COMPILE_TEST=y. Another drivers may depend on this, for example leds-asic3. Signed-off-by: Marek Behún Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 2ba269429e25..bdf8cb962027 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -290,7 +290,8 @@ config MFD_CS47L92 config MFD_ASIC3 bool "Compaq ASIC3" - depends on GPIOLIB && ARM + depends on GPIOLIB + depends on ARM || COMPILE_TEST select MFD_CORE help This driver supports the ASIC3 multifunction chip found on many -- cgit 1.4.1 From 328162a8824cfefe4f891200bc77c0bf3e7fe5ff Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 2 Oct 2020 07:53:36 +0100 Subject: mfd: sl28cpld: Depend on I2C Fixes the following randconfig build error: ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_probe': simple-mfd-i2c.c:(.text+0x48): undefined reference to `__devm_regmap_init_i2c' ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_driver_init': simple-mfd-i2c.c:(.init.text+0x14): undefined reference to `i2c_register_driver' ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_driver_exit': simple-mfd-i2c.c:(.exit.text+0xd): undefined reference to `i2c_del_driver' Reported-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Acked-by: Randy Dunlap Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index bdf8cb962027..8b99a13669bf 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1188,6 +1188,7 @@ config MFD_SIMPLE_MFD_I2C config MFD_SL28CPLD tristate "Kontron sl28cpld Board Management Controller" + depends on I2C select MFD_SIMPLE_MFD_I2C help Say yes here to enable support for the Kontron sl28cpld board -- cgit 1.4.1 From 6d81dc3c79d46b66b29712eb1ac5ad2cbe4231d2 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 2 Oct 2020 07:56:18 +0100 Subject: mfd: kempld-core: Fix unused variable 'kempld_acpi_table' when !ACPI drivers/mfd/kempld-core.c:556:36: warning: unused variable 'kempld_acpi_table' [-Wunused-const-variable] Signed-off-by: Lee Jones --- drivers/mfd/kempld-core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 1dfe556df038..2c9295953c11 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -553,11 +553,13 @@ static int kempld_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_ACPI static const struct acpi_device_id kempld_acpi_table[] = { { "KEM0001", (kernel_ulong_t)&kempld_platform_data_generic }, {} }; MODULE_DEVICE_TABLE(acpi, kempld_acpi_table); +#endif static struct platform_driver kempld_driver = { .driver = { -- cgit 1.4.1