summary refs log tree commit diff
path: root/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
AgeCommit message (Collapse)Author
2018-03-21pinctrl: sh-pfc: r8a77995: Deduplicate VIN4 pin definitionsUlrich Hecht
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies in pin definitions. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-03-21pinctrl: sh-pfc: r8a77995: Correct VIN4 18-bit pinsUlrich Hecht
RGB666 has a pin assignment that differs from the other formats. Fixes: fbd452aeb49e552e ("pinctrl: sh-pfc: r8a77995: Add VIN4 pins, groups and function") Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-03-21pinctrl: sh-pfc: r8a77995: Rename EtherAVB "mdc" pin group to "mdio"Geert Uytterhoeven
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio" instead of "mdc". Fix the inconsistency, while retaining backwards compatibility with old DTBs using a pin group alias. Fixes: 66abd968d0ef3eb1 ("pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2018-02-26pinctrl: sh-pfc: r8a77995: Add VIN4 pins, groups and functionUlrich Hecht
This patch adds VIN4 pins, groups and function for the R8A77995 (D3) SoC. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-20pinctrl: sh-pfc: r8a77995: Add DU pins, groups and functionUlrich Hecht
This patch adds DU pins, groups and function for the R8A77995 (D3) SoC. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-12-05pinctrl: sh-pfc: r8a77995: Add CAN FD supportUlrich Hecht
This patch adds CAN FD[0-1] pinmux support to the r8a77995 SoC. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-12-05pinctrl: sh-pfc: r8a77995: Add CAN supportUlrich Hecht
This patch adds CAN[0-1] pinmux support to the r8a77995 SoC. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-12-05pinctrl: sh-pfc: r8a77995: Add missing pins SCL0 and SDA0 to pinmux dataUlrich Hecht
Required for I2C0 operation. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16pinctrl: sh-pfc: r8a77995: Remove USB0_IDIN and USB0_IDPU pinsGeert Uytterhoeven
R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 8, 2017 removed the USB0_IDIN and USB0_IDPU pins on R-Car D3. This change has no functional impact, as these definitions were unused. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11pinctrl: sh-pfc: r8a77995: Add Audio SSI pin supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11pinctrl: sh-pfc: r8a77995: Add Audio clock pin supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04pinctrl: sh-pfc: r8a77995: Add PWM pins, groups and functionsTakeshi Kihara
This patch adds support for PWM on r8a77995. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19pinctrl: sh-pfc: r8a77995: Add USB2.0 host supportTakeshi Kihara
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functionsYoshihiro Shimoda
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a77995: Add voltage switch operations for MMCTakeshi Kihara
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a77995: Add MMC pins, groups and functionsTakeshi Kihara
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a77995: Add I2C pins, groups and functionsTakeshi Kihara
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: r8a77995: Add SCIF pins, groups and functionsTakeshi Kihara
This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A77995 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: Fix swapped RX3_B and SCK3_B pins] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16pinctrl: sh-pfc: Initial R8A77995 PFC supportTakeshi Kihara
This patch adds initial pinctrl driver to support for the R8A77995 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: whitespace] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-09-27 13:27:16 +0000