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path: root/drivers/gpu/drm/i915/i915_gpu_error.c
AgeCommit message (Expand)Author
2016-08-05drm/i915: Repack fence tiling mode and stride into a single integerChris Wilson
2016-08-04drm/i915: Combine all i915_vma bitfields into a single set of flagsChris Wilson
2016-08-04drm/i915: Wrap vma->pin_count accessors with small inline helpersChris Wilson
2016-08-04drm/i915: Rename request->list to link for consistencyChris Wilson
2016-08-04drm/i915: Mark up i915_gem_active for locking annotationChris Wilson
2016-08-04drm/i915: Prepare i915_gem_active for annotationsChris Wilson
2016-08-04drm/i915: Introduce i915_gem_active for request trackingChris Wilson
2016-08-02drm/i915: Rename struct intel_ringbuffer to struct intel_ringChris Wilson
2016-08-02drm/i915: Rename request->ringbuf to request->ringChris Wilson
2016-07-27drm/i915: Avoid using intel_engine_cs *ring for GPU error captureChris Wilson
2016-07-20drm/i915: Convert i915_semaphores_is_enabled over to early sanitizeChris Wilson
2016-07-20drm/i915: Derive GEM requests from dma-fenceChris Wilson
2016-07-05drm/i915: Convert dev_priv->dev backpointers to dev_priv->drmChris Wilson
2016-07-05drm/i915: Skip capturing an error state if we already have oneChris Wilson
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson
2016-07-04drm/i915: Allow userspace to request no-error-capture upon GPU hangsChris Wilson
2016-07-04drm/i915: Record the ringbuffer associated with the requestChris Wilson
2016-07-02drm/i915: Fix inconsistent indenting in i915_error_state_to_str()Chris Wilson
2016-07-01drm/i915: Use HWS for seqno tracking everywhereChris Wilson
2016-07-01drm/i915: Slaughter the thundering i915_wait_request herdChris Wilson
2016-05-11drm/i915: Replace "INTEL_INFO->gen == x" checks with IS_GENxTvrtko Ursulin
2016-05-09drm/i915: Store a i915 backpointer from engine, and use itChris Wilson
2016-04-09drm/i915: Separate out the seqno-barrier from engine->get_seqnoChris Wilson
2016-04-08drm/i915: Include engine->last_submitted_seqno in GPU error stateChris Wilson
2016-04-07drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen
2016-03-31drm/i915: Refer to GGTT {,VM} consistentlyJoonas Lahtinen
2016-03-24drm/i915: introduce for_each_engine_id()Dave Gordon
2016-03-22drm/i915/tdr: Prepare error handler to accept mask of hung enginesarun.siluvery@linux.intel.com
2016-03-18drm/i915: Rename dev_priv->gtt to dev_priv->ggttJoonas Lahtinen
2016-03-16drm/i915: More intel_engine_cs renamingTvrtko Ursulin
2016-03-16drm/i915: Rename intel_engine_cs struct membersTvrtko Ursulin
2016-03-16drm/i915: Rename intel_engine_cs function parametersTvrtko Ursulin
2016-03-16drm/i915: Rename local struct intel_engine_cs variablesTvrtko Ursulin
2016-03-04drm/i915/hangcheck: Prevent long walks across full-ppgttMika Kuoppala
2016-03-01drm/i915/error: Capture WA ctx batch in error statearun.siluvery@linux.intel.com
2016-02-26drm/i915: Rename vma->*_list to *_link for consistencyChris Wilson
2016-02-10drm/i915: Capture PCI revision and subsytem details in error stateArun Siluvery
2016-01-21drm/i915: abolish separate per-ring default_context pointersDave Gordon
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä
2015-11-18drm/i915: s/0x50/RING_PSMI_CTL/Ville Syrjälä
2015-11-09drm/i915: Add dmc firmware load state and version to error stateMika Kuoppala
2015-10-26drm/i915: Read FORCEWAKE registers with I915_READ_FW()Ville Syrjälä
2015-10-23drm/i915: Cope with request list state change during error state captureTomas Elf
2015-10-23Revert "drm/i915: Add soft-pinning API for execbuffer"Daniel Vetter
2015-10-22drm/i915: Add soft-pinning API for execbufferChris Wilson
2015-10-02drm/i915: rename INSTDONE1 to GEN4_INSTDONE1Imre Deak
2015-10-02drm/i915: rename INSTDONE to GEN2_INSTDONEImre Deak
2015-10-02drm/i915: remove duplicate names for the render ring INSTDONE registerImre Deak
2015-09-30drm/i915: Parametrize fence registersVille Syrjälä
2015-09-23drm/i915: fix crash in error state readout on non-execlist platforms v2Jesse Barnes
generated by cgit-pink 1.4.1 (git 2.36.1) at 2024-10-17 01:39:04 +0000