diff options
Diffstat (limited to 'drivers/scsi/myrs.c')
| -rw-r--r-- | drivers/scsi/myrs.c | 117 |
1 files changed, 8 insertions, 109 deletions
diff --git a/drivers/scsi/myrs.c b/drivers/scsi/myrs.c index 329fd025c718..3b68c68d1716 100644 --- a/drivers/scsi/myrs.c +++ b/drivers/scsi/myrs.c @@ -1190,7 +1190,6 @@ static ssize_t consistency_check_show(struct device *dev, struct myrs_hba *cs = shost_priv(sdev->host); struct myrs_ldev_info *ldev_info; unsigned short ldev_num; - unsigned char status; if (sdev->channel < cs->ctlr_info->physchan_present) return snprintf(buf, 32, "physical device - not checking\n"); @@ -1199,7 +1198,7 @@ static ssize_t consistency_check_show(struct device *dev, if (!ldev_info) return -ENXIO; ldev_num = ldev_info->ldev_num; - status = myrs_get_ldev_info(cs, ldev_num, ldev_info); + myrs_get_ldev_info(cs, ldev_num, ldev_info); if (ldev_info->cc_active) return snprintf(buf, 32, "checking block %zu of %zu\n", (size_t)ldev_info->cc_lba, @@ -1959,7 +1958,7 @@ static struct myrs_hba *myrs_alloc_host(struct pci_dev *pdev, /** * myrs_is_raid - return boolean indicating device is raid volume - * @dev the device struct object + * @dev: the device struct object */ static int myrs_is_raid(struct device *dev) @@ -1972,7 +1971,7 @@ myrs_is_raid(struct device *dev) /** * myrs_get_resync - get raid volume resync percent complete - * @dev the device struct object + * @dev: the device struct object */ static void myrs_get_resync(struct device *dev) @@ -1981,14 +1980,13 @@ myrs_get_resync(struct device *dev) struct myrs_hba *cs = shost_priv(sdev->host); struct myrs_ldev_info *ldev_info = sdev->hostdata; u64 percent_complete = 0; - u8 status; if (sdev->channel < cs->ctlr_info->physchan_present || !ldev_info) return; if (ldev_info->rbld_active) { unsigned short ldev_num = ldev_info->ldev_num; - status = myrs_get_ldev_info(cs, ldev_num, ldev_info); + myrs_get_ldev_info(cs, ldev_num, ldev_info); percent_complete = ldev_info->rbld_lba * 100; do_div(percent_complete, ldev_info->cfg_devsize); } @@ -1997,7 +1995,7 @@ myrs_get_resync(struct device *dev) /** * myrs_get_state - get raid volume status - * @dev the device struct object + * @dev: the device struct object */ static void myrs_get_state(struct device *dev) @@ -2412,13 +2410,6 @@ static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base) writel(val, base + DAC960_GEM_IDB_CLEAR_OFFSET); } -static inline void DAC960_GEM_gen_intr(void __iomem *base) -{ - __le32 val = cpu_to_le32(DAC960_GEM_IDB_GEN_IRQ << 24); - - writel(val, base + DAC960_GEM_IDB_READ_OFFSET); -} - static inline void DAC960_GEM_reset_ctrl(void __iomem *base) { __le32 val = cpu_to_le32(DAC960_GEM_IDB_CTRL_RESET << 24); @@ -2456,13 +2447,6 @@ static inline void DAC960_GEM_ack_hw_mbox_intr(void __iomem *base) writel(val, base + DAC960_GEM_ODB_CLEAR_OFFSET); } -static inline void DAC960_GEM_ack_mem_mbox_intr(void __iomem *base) -{ - __le32 val = cpu_to_le32(DAC960_GEM_ODB_MMBOX_ACK_IRQ << 24); - - writel(val, base + DAC960_GEM_ODB_CLEAR_OFFSET); -} - static inline void DAC960_GEM_ack_intr(void __iomem *base) { __le32 val = cpu_to_le32((DAC960_GEM_ODB_HWMBOX_ACK_IRQ | @@ -2479,14 +2463,6 @@ static inline bool DAC960_GEM_hw_mbox_status_available(void __iomem *base) return (le32_to_cpu(val) >> 24) & DAC960_GEM_ODB_HWMBOX_STS_AVAIL; } -static inline bool DAC960_GEM_mem_mbox_status_available(void __iomem *base) -{ - __le32 val; - - val = readl(base + DAC960_GEM_ODB_READ_OFFSET); - return (le32_to_cpu(val) >> 24) & DAC960_GEM_ODB_MMBOX_STS_AVAIL; -} - static inline void DAC960_GEM_enable_intr(void __iomem *base) { __le32 val = cpu_to_le32((DAC960_GEM_IRQMASK_HWMBOX_IRQ | @@ -2501,16 +2477,6 @@ static inline void DAC960_GEM_disable_intr(void __iomem *base) writel(val, base + DAC960_GEM_IRQMASK_READ_OFFSET); } -static inline bool DAC960_GEM_intr_enabled(void __iomem *base) -{ - __le32 val; - - val = readl(base + DAC960_GEM_IRQMASK_READ_OFFSET); - return !((le32_to_cpu(val) >> 24) & - (DAC960_GEM_IRQMASK_HWMBOX_IRQ | - DAC960_GEM_IRQMASK_MMBOX_IRQ)); -} - static inline void DAC960_GEM_write_cmd_mbox(union myrs_cmd_mbox *mem_mbox, union myrs_cmd_mbox *mbox) { @@ -2529,11 +2495,6 @@ static inline void DAC960_GEM_write_hw_mbox(void __iomem *base, dma_addr_writeql(cmd_mbox_addr, base + DAC960_GEM_CMDMBX_OFFSET); } -static inline unsigned short DAC960_GEM_read_cmd_ident(void __iomem *base) -{ - return readw(base + DAC960_GEM_CMDSTS_OFFSET); -} - static inline unsigned char DAC960_GEM_read_cmd_status(void __iomem *base) { return readw(base + DAC960_GEM_CMDSTS_OFFSET + 2); @@ -2658,7 +2619,7 @@ static irqreturn_t DAC960_GEM_intr_handler(int irq, void *arg) return IRQ_HANDLED; } -struct myrs_privdata DAC960_GEM_privdata = { +static struct myrs_privdata DAC960_GEM_privdata = { .hw_init = DAC960_GEM_hw_init, .irq_handler = DAC960_GEM_intr_handler, .mmio_size = DAC960_GEM_mmio_size, @@ -2678,11 +2639,6 @@ static inline void DAC960_BA_ack_hw_mbox_status(void __iomem *base) writeb(DAC960_BA_IDB_HWMBOX_ACK_STS, base + DAC960_BA_IDB_OFFSET); } -static inline void DAC960_BA_gen_intr(void __iomem *base) -{ - writeb(DAC960_BA_IDB_GEN_IRQ, base + DAC960_BA_IDB_OFFSET); -} - static inline void DAC960_BA_reset_ctrl(void __iomem *base) { writeb(DAC960_BA_IDB_CTRL_RESET, base + DAC960_BA_IDB_OFFSET); @@ -2714,11 +2670,6 @@ static inline void DAC960_BA_ack_hw_mbox_intr(void __iomem *base) writeb(DAC960_BA_ODB_HWMBOX_ACK_IRQ, base + DAC960_BA_ODB_OFFSET); } -static inline void DAC960_BA_ack_mem_mbox_intr(void __iomem *base) -{ - writeb(DAC960_BA_ODB_MMBOX_ACK_IRQ, base + DAC960_BA_ODB_OFFSET); -} - static inline void DAC960_BA_ack_intr(void __iomem *base) { writeb(DAC960_BA_ODB_HWMBOX_ACK_IRQ | DAC960_BA_ODB_MMBOX_ACK_IRQ, @@ -2733,14 +2684,6 @@ static inline bool DAC960_BA_hw_mbox_status_available(void __iomem *base) return val & DAC960_BA_ODB_HWMBOX_STS_AVAIL; } -static inline bool DAC960_BA_mem_mbox_status_available(void __iomem *base) -{ - u8 val; - - val = readb(base + DAC960_BA_ODB_OFFSET); - return val & DAC960_BA_ODB_MMBOX_STS_AVAIL; -} - static inline void DAC960_BA_enable_intr(void __iomem *base) { writeb(~DAC960_BA_IRQMASK_DISABLE_IRQ, base + DAC960_BA_IRQMASK_OFFSET); @@ -2751,14 +2694,6 @@ static inline void DAC960_BA_disable_intr(void __iomem *base) writeb(0xFF, base + DAC960_BA_IRQMASK_OFFSET); } -static inline bool DAC960_BA_intr_enabled(void __iomem *base) -{ - u8 val; - - val = readb(base + DAC960_BA_IRQMASK_OFFSET); - return !(val & DAC960_BA_IRQMASK_DISABLE_IRQ); -} - static inline void DAC960_BA_write_cmd_mbox(union myrs_cmd_mbox *mem_mbox, union myrs_cmd_mbox *mbox) { @@ -2778,11 +2713,6 @@ static inline void DAC960_BA_write_hw_mbox(void __iomem *base, dma_addr_writeql(cmd_mbox_addr, base + DAC960_BA_CMDMBX_OFFSET); } -static inline unsigned short DAC960_BA_read_cmd_ident(void __iomem *base) -{ - return readw(base + DAC960_BA_CMDSTS_OFFSET); -} - static inline unsigned char DAC960_BA_read_cmd_status(void __iomem *base) { return readw(base + DAC960_BA_CMDSTS_OFFSET + 2); @@ -2908,7 +2838,7 @@ static irqreturn_t DAC960_BA_intr_handler(int irq, void *arg) return IRQ_HANDLED; } -struct myrs_privdata DAC960_BA_privdata = { +static struct myrs_privdata DAC960_BA_privdata = { .hw_init = DAC960_BA_hw_init, .irq_handler = DAC960_BA_intr_handler, .mmio_size = DAC960_BA_mmio_size, @@ -2928,11 +2858,6 @@ static inline void DAC960_LP_ack_hw_mbox_status(void __iomem *base) writeb(DAC960_LP_IDB_HWMBOX_ACK_STS, base + DAC960_LP_IDB_OFFSET); } -static inline void DAC960_LP_gen_intr(void __iomem *base) -{ - writeb(DAC960_LP_IDB_GEN_IRQ, base + DAC960_LP_IDB_OFFSET); -} - static inline void DAC960_LP_reset_ctrl(void __iomem *base) { writeb(DAC960_LP_IDB_CTRL_RESET, base + DAC960_LP_IDB_OFFSET); @@ -2964,11 +2889,6 @@ static inline void DAC960_LP_ack_hw_mbox_intr(void __iomem *base) writeb(DAC960_LP_ODB_HWMBOX_ACK_IRQ, base + DAC960_LP_ODB_OFFSET); } -static inline void DAC960_LP_ack_mem_mbox_intr(void __iomem *base) -{ - writeb(DAC960_LP_ODB_MMBOX_ACK_IRQ, base + DAC960_LP_ODB_OFFSET); -} - static inline void DAC960_LP_ack_intr(void __iomem *base) { writeb(DAC960_LP_ODB_HWMBOX_ACK_IRQ | DAC960_LP_ODB_MMBOX_ACK_IRQ, @@ -2983,14 +2903,6 @@ static inline bool DAC960_LP_hw_mbox_status_available(void __iomem *base) return val & DAC960_LP_ODB_HWMBOX_STS_AVAIL; } -static inline bool DAC960_LP_mem_mbox_status_available(void __iomem *base) -{ - u8 val; - - val = readb(base + DAC960_LP_ODB_OFFSET); - return val & DAC960_LP_ODB_MMBOX_STS_AVAIL; -} - static inline void DAC960_LP_enable_intr(void __iomem *base) { writeb(~DAC960_LP_IRQMASK_DISABLE_IRQ, base + DAC960_LP_IRQMASK_OFFSET); @@ -3001,14 +2913,6 @@ static inline void DAC960_LP_disable_intr(void __iomem *base) writeb(0xFF, base + DAC960_LP_IRQMASK_OFFSET); } -static inline bool DAC960_LP_intr_enabled(void __iomem *base) -{ - u8 val; - - val = readb(base + DAC960_LP_IRQMASK_OFFSET); - return !(val & DAC960_LP_IRQMASK_DISABLE_IRQ); -} - static inline void DAC960_LP_write_cmd_mbox(union myrs_cmd_mbox *mem_mbox, union myrs_cmd_mbox *mbox) { @@ -3027,11 +2931,6 @@ static inline void DAC960_LP_write_hw_mbox(void __iomem *base, dma_addr_writeql(cmd_mbox_addr, base + DAC960_LP_CMDMBX_OFFSET); } -static inline unsigned short DAC960_LP_read_cmd_ident(void __iomem *base) -{ - return readw(base + DAC960_LP_CMDSTS_OFFSET); -} - static inline unsigned char DAC960_LP_read_cmd_status(void __iomem *base) { return readw(base + DAC960_LP_CMDSTS_OFFSET + 2); @@ -3158,7 +3057,7 @@ static irqreturn_t DAC960_LP_intr_handler(int irq, void *arg) return IRQ_HANDLED; } -struct myrs_privdata DAC960_LP_privdata = { +static struct myrs_privdata DAC960_LP_privdata = { .hw_init = DAC960_LP_hw_init, .irq_handler = DAC960_LP_intr_handler, .mmio_size = DAC960_LP_mmio_size, |