diff options
28 files changed, 1043 insertions, 462 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 85afb031b676..70f94c87479d 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -105,11 +105,6 @@ config EXYNOS4_SETUP_FIMD0 help Common setup code for FIMD0. -config EXYNOS_DEV_SYSMMU - bool - help - Common setup code for SYSTEM MMU in EXYNOS platforms - config EXYNOS4_DEV_USB_OHCI bool help diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index b189881657ec..435757e57bb4 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -52,7 +52,6 @@ obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o -obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index bbcb3dea0d40..8a8468d83c8c 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -24,7 +24,6 @@ #include <mach/map.h> #include <mach/regs-clock.h> -#include <mach/sysmmu.h> #include "common.h" #include "clock-exynos4.h" @@ -709,53 +708,53 @@ static struct clk exynos4_init_clocks_off[] = { .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 14), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(mfc_l, 0), + .name = "sysmmu", + .devname = "exynos-sysmmu.0", .enable = exynos4_clk_ip_mfc_ctrl, .ctrlbit = (1 << 1), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(mfc_r, 1), + .name = "sysmmu", + .devname = "exynos-sysmmu.1", .enable = exynos4_clk_ip_mfc_ctrl, .ctrlbit = (1 << 2), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(tv, 2), + .name = "sysmmu", + .devname = "exynos-sysmmu.2", .enable = exynos4_clk_ip_tv_ctrl, .ctrlbit = (1 << 4), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(jpeg, 3), + .name = "sysmmu", + .devname = "exynos-sysmmu.3", .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 11), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(rot, 4), + .name = "sysmmu", + .devname = "exynos-sysmmu.4", .enable = exynos4_clk_ip_image_ctrl, .ctrlbit = (1 << 4), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(fimc0, 5), + .name = "sysmmu", + .devname = "exynos-sysmmu.5", .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 7), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(fimc1, 6), + .name = "sysmmu", + .devname = "exynos-sysmmu.6", .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 8), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(fimc2, 7), + .name = "sysmmu", + .devname = "exynos-sysmmu.7", .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 9), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(fimc3, 8), + .name = "sysmmu", + .devname = "exynos-sysmmu.8", .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 10), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(fimd0, 10), + .name = "sysmmu", + .devname = "exynos-sysmmu.10", .enable = exynos4_clk_ip_lcd0_ctrl, .ctrlbit = (1 << 4), } diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c index fed4c26e9dad..19af9f783c56 100644 --- a/arch/arm/mach-exynos/clock-exynos4210.c +++ b/arch/arm/mach-exynos/clock-exynos4210.c @@ -26,7 +26,6 @@ #include <mach/hardware.h> #include <mach/map.h> #include <mach/regs-clock.h> -#include <mach/sysmmu.h> #include "common.h" #include "clock-exynos4.h" @@ -129,13 +128,13 @@ static struct clk init_clocks_off[] = { .enable = exynos4_clk_ip_lcd1_ctrl, .ctrlbit = (1 << 0), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(2d, 14), + .name = "sysmmu", + .devname = "exynos-sysmmu.9", .enable = exynos4_clk_ip_image_ctrl, .ctrlbit = (1 << 3), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(fimd1, 11), + .name = "sysmmu", + .devname = "exynos-sysmmu.11", .enable = exynos4_clk_ip_lcd1_ctrl, .ctrlbit = (1 << 4), }, { diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index 8fba0b5fb8ab..529476f8ec71 100644 --- a/arch/arm/mach-exynos/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c @@ -26,7 +26,6 @@ #include <mach/hardware.h> #include <mach/map.h> #include <mach/regs-clock.h> -#include <mach/sysmmu.h> #include "common.h" #include "clock-exynos4.h" @@ -111,21 +110,31 @@ static struct clksrc_clk clksrcs[] = { static struct clk init_clocks_off[] = { { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(2d, 14), + .name = "sysmmu", + .devname = "exynos-sysmmu.9", .enable = exynos4_clk_ip_dmc_ctrl, .ctrlbit = (1 << 24), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), + .name = "sysmmu", + .devname = "exynos-sysmmu.12", .enable = exynos4212_clk_ip_isp0_ctrl, .ctrlbit = (7 << 8), }, { - .name = SYSMMU_CLOCK_NAME2, - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), + .name = "sysmmu", + .devname = "exynos-sysmmu.13", .enable = exynos4212_clk_ip_isp1_ctrl, .ctrlbit = (1 << 4), }, { + .name = "sysmmu", + .devname = "exynos-sysmmu.14", + .enable = exynos4212_clk_ip_isp0_ctrl, + .ctrlbit = (1 << 11), + }, { + .name = "sysmmu", + .devname = "exynos-sysmmu.15", + .enable = exynos4212_clk_ip_isp0_ctrl, + .ctrlbit = (1 << 12), + }, { .name = "flite", .devname = "exynos-fimc-lite.0", .enable = exynos4212_clk_ip_isp0_ctrl, diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index e9d7b80bae49..b0ea31fc9fb8 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -24,7 +24,6 @@ #include <mach/map.h> #include <mach/regs-clock.h> -#include <mach/sysmmu.h> #include "common.h" @@ -859,73 +858,78 @@ static struct clk exynos5_init_clocks_off[] = { .enable = exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 3), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(mfc_l, 0), + .name = "sysmmu", + .devname = "exynos-sysmmu.1", .enable = &exynos5_clk_ip_mfc_ctrl, .ctrlbit = (1 << 1), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(mfc_r, 1), + .name = "sysmmu", + .devname = "exynos-sysmmu.0", .enable = &exynos5_clk_ip_mfc_ctrl, .ctrlbit = (1 << 2), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(tv, 2), + .name = "sysmmu", + .devname = "exynos-sysmmu.2", .enable = &exynos5_clk_ip_disp1_ctrl, .ctrlbit = (1 << 9) }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(jpeg, 3), + .name = "sysmmu", + .devname = "exynos-sysmmu.3", .enable = &exynos5_clk_ip_gen_ctrl, .ctrlbit = (1 << 7), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(rot, 4), + .name = "sysmmu", + .devname = "exynos-sysmmu.4", .enable = &exynos5_clk_ip_gen_ctrl, .ctrlbit = (1 << 6) }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(gsc0, 5), + .name = "sysmmu", + .devname = "exynos-sysmmu.5", .enable = &exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 7), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(gsc1, 6), + .name = "sysmmu", + .devname = "exynos-sysmmu.6", .enable = &exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 8), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(gsc2, 7), + .name = "sysmmu", + .devname = "exynos-sysmmu.7", .enable = &exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 9), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(gsc3, 8), + .name = "sysmmu", + .devname = "exynos-sysmmu.8", .enable = &exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 10), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), + .name = "sysmmu", + .devname = "exynos-sysmmu.9", .enable = &exynos5_clk_ip_isp0_ctrl, .ctrlbit = (0x3F << 8), }, { - .name = SYSMMU_CLOCK_NAME2, - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), + .name = "sysmmu", + .devname = "exynos-sysmmu.10", .enable = &exynos5_clk_ip_isp1_ctrl, .ctrlbit = (0xF << 4), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(camif0, 12), + .name = "sysmmu", + .devname = "exynos-sysmmu.11", + .enable = &exynos5_clk_ip_disp1_ctrl, + .ctrlbit = (1 << 8) + }, { + .name = "sysmmu", + .devname = "exynos-sysmmu.12", .enable = &exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 11), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(camif1, 13), + .name = "sysmmu", + .devname = "exynos-sysmmu.13", .enable = &exynos5_clk_ip_gscl_ctrl, .ctrlbit = (1 << 12), }, { - .name = SYSMMU_CLOCK_NAME, - .devname = SYSMMU_CLOCK_DEVNAME(2d, 14), + .name = "sysmmu", + .devname = "exynos-sysmmu.14", .enable = &exynos5_clk_ip_acp_ctrl, .ctrlbit = (1 << 7) } diff --git a/arch/arm/mach-exynos/dev-sysmmu.c b/arch/arm/mach-exynos/dev-sysmmu.c deleted file mode 100644 index c5b1ea301df0..000000000000 --- a/arch/arm/mach-exynos/dev-sysmmu.c +++ /dev/null @@ -1,274 +0,0 @@ -/* linux/arch/arm/mach-exynos/dev-sysmmu.c - * - * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - System MMU support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> - -#include <plat/cpu.h> - -#include <mach/map.h> -#include <mach/irqs.h> -#include <mach/sysmmu.h> - -static u64 exynos_sysmmu_dma_mask = DMA_BIT_MASK(32); - -#define SYSMMU_PLATFORM_DEVICE(ipname, devid) \ -static struct sysmmu_platform_data platdata_##ipname = { \ - .dbgname = #ipname, \ -}; \ -struct platform_device SYSMMU_PLATDEV(ipname) = \ -{ \ - .name = SYSMMU_DEVNAME_BASE, \ - .id = devid, \ - .dev = { \ - .dma_mask = &exynos_sysmmu_dma_mask, \ - .coherent_dma_mask = DMA_BIT_MASK(32), \ - .platform_data = &platdata_##ipname, \ - }, \ -} - -SYSMMU_PLATFORM_DEVICE(mfc_l, 0); -SYSMMU_PLATFORM_DEVICE(mfc_r, 1); -SYSMMU_PLATFORM_DEVICE(tv, 2); -SYSMMU_PLATFORM_DEVICE(jpeg, 3); -SYSMMU_PLATFORM_DEVICE(rot, 4); -SYSMMU_PLATFORM_DEVICE(fimc0, 5); /* fimc* and gsc* exist exclusively */ -SYSMMU_PLATFORM_DEVICE(fimc1, 6); -SYSMMU_PLATFORM_DEVICE(fimc2, 7); -SYSMMU_PLATFORM_DEVICE(fimc3, 8); -SYSMMU_PLATFORM_DEVICE(gsc0, 5); -SYSMMU_PLATFORM_DEVICE(gsc1, 6); -SYSMMU_PLATFORM_DEVICE(gsc2, 7); -SYSMMU_PLATFORM_DEVICE(gsc3, 8); -SYSMMU_PLATFORM_DEVICE(isp, 9); -SYSMMU_PLATFORM_DEVICE(fimd0, 10); -SYSMMU_PLATFORM_DEVICE(fimd1, 11); -SYSMMU_PLATFORM_DEVICE(camif0, 12); -SYSMMU_PLATFORM_DEVICE(camif1, 13); -SYSMMU_PLATFORM_DEVICE(2d, 14); - -#define SYSMMU_RESOURCE_NAME(core, ipname) sysmmures_##core##_##ipname - -#define SYSMMU_RESOURCE(core, ipname) \ - static struct resource SYSMMU_RESOURCE_NAME(core, ipname)[] __initdata = - -#define DEFINE_SYSMMU_RESOURCE(core, mem, irq) \ - DEFINE_RES_MEM_NAMED(core##_PA_SYSMMU_##mem, SZ_4K, #mem), \ - DEFINE_RES_IRQ_NAMED(core##_IRQ_SYSMMU_##irq##_0, #mem) - -#define SYSMMU_RESOURCE_DEFINE(core, ipname, mem, irq) \ - SYSMMU_RESOURCE(core, ipname) { \ - DEFINE_SYSMMU_RESOURCE(core, mem, irq) \ - } - -struct sysmmu_resource_map { - struct platform_device *pdev; - struct resource *res; - u32 rnum; - struct device *pdd; - char *clocknames; -}; - -#define SYSMMU_RESOURCE_MAPPING(core, ipname, resname) { \ - .pdev = &SYSMMU_PLATDEV(ipname), \ - .res = SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ - .clocknames = SYSMMU_CLOCK_NAME, \ -} - -#define SYSMMU_RESOURCE_MAPPING_MC(core, ipname, resname, pdata) { \ - .pdev = &SYSMMU_PLATDEV(ipname), \ - .res = SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ - .clocknames = SYSMMU_CLOCK_NAME "," SYSMMU_CLOCK_NAME2, \ -} - -#ifdef CONFIG_EXYNOS_DEV_PD -#define SYSMMU_RESOURCE_MAPPING_PD(core, ipname, resname, pd) { \ - .pdev = &SYSMMU_PLATDEV(ipname), \ - .res = &SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ - .clocknames = SYSMMU_CLOCK_NAME, \ - .pdd = &exynos##core##_device_pd[pd].dev, \ -} - -#define SYSMMU_RESOURCE_MAPPING_MCPD(core, ipname, resname, pd, pdata) {\ - .pdev = &SYSMMU_PLATDEV(ipname), \ - .res = &SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ - .clocknames = SYSMMU_CLOCK_NAME "," SYSMMU_CLOCK_NAME2, \ - .pdd = &exynos##core##_device_pd[pd].dev, \ -} -#else -#define SYSMMU_RESOURCE_MAPPING_PD(core, ipname, resname, pd) \ - SYSMMU_RESOURCE_MAPPING(core, ipname, resname) -#define SYSMMU_RESOURCE_MAPPING_MCPD(core, ipname, resname, pd, pdata) \ - SYSMMU_RESOURCE_MAPPING_MC(core, ipname, resname, pdata) - -#endif /* CONFIG_EXYNOS_DEV_PD */ - -#ifdef CONFIG_ARCH_EXYNOS4 -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc0, FIMC0, FIMC0); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc1, FIMC1, FIMC1); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc2, FIMC2, FIMC2); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc3, FIMC3, FIMC3); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, jpeg, JPEG, JPEG); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, 2d, G2D, 2D); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, tv, TV, TV_M0); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, 2d_acp, 2D_ACP, 2D); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, rot, ROTATOR, ROTATOR); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimd0, FIMD0, LCD0_M0); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimd1, FIMD1, LCD1_M1); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, flite0, FIMC_LITE0, FIMC_LITE0); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, flite1, FIMC_LITE1, FIMC_LITE1); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, mfc_r, MFC_R, MFC_M0); -SYSMMU_RESOURCE_DEFINE(EXYNOS4, mfc_l, MFC_L, MFC_M1); -SYSMMU_RESOURCE(EXYNOS4, isp) { - DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_ISP, FIMC_ISP), - DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_DRC, FIMC_DRC), - DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_FD, FIMC_FD), - DEFINE_SYSMMU_RESOURCE(EXYNOS4, ISPCPU, FIMC_CX), -}; - -static struct sysmmu_resource_map sysmmu_resmap4[] __initdata = { - SYSMMU_RESOURCE_MAPPING_PD(4, fimc0, fimc0, PD_CAM), - SYSMMU_RESOURCE_MAPPING_PD(4, fimc1, fimc1, PD_CAM), - SYSMMU_RESOURCE_MAPPING_PD(4, fimc2, fimc2, PD_CAM), - SYSMMU_RESOURCE_MAPPING_PD(4, fimc3, fimc3, PD_CAM), - SYSMMU_RESOURCE_MAPPING_PD(4, tv, tv, PD_TV), - SYSMMU_RESOURCE_MAPPING_PD(4, mfc_r, mfc_r, PD_MFC), - SYSMMU_RESOURCE_MAPPING_PD(4, mfc_l, mfc_l, PD_MFC), - SYSMMU_RESOURCE_MAPPING_PD(4, rot, rot, PD_LCD0), - SYSMMU_RESOURCE_MAPPING_PD(4, jpeg, jpeg, PD_CAM), - SYSMMU_RESOURCE_MAPPING_PD(4, fimd0, fimd0, PD_LCD0), -}; - -static struct sysmmu_resource_map sysmmu_resmap4210[] __initdata = { - SYSMMU_RESOURCE_MAPPING_PD(4, 2d, 2d, PD_LCD0), - SYSMMU_RESOURCE_MAPPING_PD(4, fimd1, fimd1, PD_LCD1), -}; - -static struct sysmmu_resource_map sysmmu_resmap4212[] __initdata = { - SYSMMU_RESOURCE_MAPPING(4, 2d, 2d_acp), - SYSMMU_RESOURCE_MAPPING_PD(4, camif0, flite0, PD_ISP), - SYSMMU_RESOURCE_MAPPING_PD(4, camif1, flite1, PD_ISP), - SYSMMU_RESOURCE_MAPPING_PD(4, isp, isp, PD_ISP), -}; -#endif /* CONFIG_ARCH_EXYNOS4 */ - -#ifdef CONFIG_ARCH_EXYNOS5 -SYSMMU_RESOURCE_DEFINE(EXYNOS5, jpeg, JPEG, JPEG); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, fimd1, FIMD1, FIMD1); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, 2d, 2D, 2D); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, rot, ROTATOR, ROTATOR); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, tv, TV, TV); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, flite0, LITE0, LITE0); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, flite1, LITE1, LITE1); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc0, GSC0, GSC0); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc1, GSC1, GSC1); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc2, GSC2, GSC2); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc3, GSC3, GSC3); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, mfc_r, MFC_R, MFC_R); -SYSMMU_RESOURCE_DEFINE(EXYNOS5, mfc_l, MFC_L, MFC_L); -SYSMMU_RESOURCE(EXYNOS5, isp) { - DEFINE_SYSMMU_RESOURCE(EXYNOS5, ISP, ISP), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, DRC, DRC), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, FD, FD), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, ISPCPU, MCUISP), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, SCALERC, SCALERCISP), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, SCALERP, SCALERPISP), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, ODC, ODC), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, DIS0, DIS0), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, DIS1, DIS1), - DEFINE_SYSMMU_RESOURCE(EXYNOS5, 3DNR, 3DNR), -}; - -static struct sysmmu_resource_map sysmmu_resmap5[] __initdata = { - SYSMMU_RESOURCE_MAPPING(5, jpeg, jpeg), - SYSMMU_RESOURCE_MAPPING(5, fimd1, fimd1), - SYSMMU_RESOURCE_MAPPING(5, 2d, 2d), - SYSMMU_RESOURCE_MAPPING(5, rot, rot), - SYSMMU_RESOURCE_MAPPING_PD(5, tv, tv, PD_DISP1), - SYSMMU_RESOURCE_MAPPING_PD(5, camif0, flite0, PD_GSCL), - SYSMMU_RESOURCE_MAPPING_PD(5, camif1, flite1, PD_GSCL), - SYSMMU_RESOURCE_MAPPING_PD(5, gsc0, gsc0, PD_GSCL), - SYSMMU_RESOURCE_MAPPING_PD(5, gsc1, gsc1, PD_GSCL), - SYSMMU_RESOURCE_MAPPING_PD(5, gsc2, gsc2, PD_GSCL), - SYSMMU_RESOURCE_MAPPING_PD(5, gsc3, gsc3, PD_GSCL), - SYSMMU_RESOURCE_MAPPING_PD(5, mfc_r, mfc_r, PD_MFC), - SYSMMU_RESOURCE_MAPPING_PD(5, mfc_l, mfc_l, PD_MFC), - SYSMMU_RESOURCE_MAPPING_MCPD(5, isp, isp, PD_ISP, mc_platdata), -}; -#endif /* CONFIG_ARCH_EXYNOS5 */ - -static int __init init_sysmmu_platform_device(void) -{ - int i, j; - struct sysmmu_resource_map *resmap[2] = {NULL, NULL}; - int nmap[2] = {0, 0}; - -#ifdef CONFIG_ARCH_EXYNOS5 - if (soc_is_exynos5250()) { - resmap[0] = sysmmu_resmap5; - nmap[0] = ARRAY_SIZE(sysmmu_resmap5); - nmap[1] = 0; - } -#endif - -#ifdef CONFIG_ARCH_EXYNOS4 - if (resmap[0] == NULL) { - resmap[0] = sysmmu_resmap4; - nmap[0] = ARRAY_SIZE(sysmmu_resmap4); - } - - if (soc_is_exynos4210()) { - resmap[1] = sysmmu_resmap4210; - nmap[1] = ARRAY_SIZE(sysmmu_resmap4210); - } - - if (soc_is_exynos4412() || soc_is_exynos4212()) { - resmap[1] = sysmmu_resmap4212; - nmap[1] = ARRAY_SIZE(sysmmu_resmap4212); - } -#endif - - for (j = 0; j < 2; j++) { - for (i = 0; i < nmap[j]; i++) { - struct sysmmu_resource_map *map; - struct sysmmu_platform_data *platdata; - - map = &resmap[j][i]; - - map->pdev->dev.parent = map->pdd; - - platdata = map->pdev->dev.platform_data; - platdata->clockname = map->clocknames; - - if (platform_device_add_resources(map->pdev, map->res, - map->rnum)) { - pr_err("%s: Failed to add device resources for " - "%s.%d\n", __func__, - map->pdev->name, map->pdev->id); - continue; - } - - if (platform_device_register(map->pdev)) { - pr_err("%s: Failed to register %s.%d\n", - __func__, map->pdev->name, - map->pdev->id); - } - } - } - - return 0; -} -arch_initcall(init_sysmmu_platform_device); diff --git a/arch/arm/mach-exynos/include/mach/sysmmu.h b/arch/arm/mach-exynos/include/mach/sysmmu.h deleted file mode 100644 index 88a4543b0001..000000000000 --- a/arch/arm/mach-exynos/include/mach/sysmmu.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - System MMU support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _ARM_MACH_EXYNOS_SYSMMU_H_ -#define _ARM_MACH_EXYNOS_SYSMMU_H_ - -struct sysmmu_platform_data { - char *dbgname; - /* comma(,) separated list of clock names for clock gating */ - char *clockname; -}; - -#define SYSMMU_DEVNAME_BASE "exynos-sysmmu" - -#define SYSMMU_CLOCK_NAME "sysmmu" -#define SYSMMU_CLOCK_NAME2 "sysmmu_mc" - -#ifdef CONFIG_EXYNOS_DEV_SYSMMU -#include <linux/device.h> -struct platform_device; - -#define SYSMMU_PLATDEV(ipname) exynos_device_sysmmu_##ipname - -extern struct platform_device SYSMMU_PLATDEV(mfc_l); -extern struct platform_device SYSMMU_PLATDEV(mfc_r); -extern struct platform_device SYSMMU_PLATDEV(tv); -extern struct platform_device SYSMMU_PLATDEV(jpeg); -extern struct platform_device SYSMMU_PLATDEV(rot); -extern struct platform_device SYSMMU_PLATDEV(fimc0); -extern struct platform_device SYSMMU_PLATDEV(fimc1); -extern struct platform_device SYSMMU_PLATDEV(fimc2); -extern struct platform_device SYSMMU_PLATDEV(fimc3); -extern struct platform_device SYSMMU_PLATDEV(gsc0); -extern struct platform_device SYSMMU_PLATDEV(gsc1); -extern struct platform_device SYSMMU_PLATDEV(gsc2); -extern struct platform_device SYSMMU_PLATDEV(gsc3); -extern struct platform_device SYSMMU_PLATDEV(isp); -extern struct platform_device SYSMMU_PLATDEV(fimd0); -extern struct platform_device SYSMMU_PLATDEV(fimd1); -extern struct platform_device SYSMMU_PLATDEV(camif0); -extern struct platform_device SYSMMU_PLATDEV(camif1); -extern struct platform_device SYSMMU_PLATDEV(2d); - -#ifdef CONFIG_IOMMU_API -static inline void platform_set_sysmmu( - struct device *sysmmu, struct device *dev) -{ - dev->archdata.iommu = sysmmu; -} -#endif - -#else /* !CONFIG_EXYNOS_DEV_SYSMMU */ -#define platform_set_sysmmu(sysmmu, dev) do { } while (0) -#endif - -#define SYSMMU_CLOCK_DEVNAME(ipname, id) (SYSMMU_DEVNAME_BASE "." #id) - -#endif /* _ARM_MACH_EXYNOS_SYSMMU_H_ */ diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index 112d10e53d20..3358088c822a 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -79,6 +79,40 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_MDMA1, "dma-pl330.2", NULL), OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU, "exynos-tmu", NULL), + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13620000, + "exynos-sysmmu.0", NULL), /* MFC_L */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13630000, + "exynos-sysmmu.1", NULL), /* MFC_R */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E20000, + "exynos-sysmmu.2", NULL), /* TV */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A60000, + "exynos-sysmmu.3", NULL), /* JPEG */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12A30000, + "exynos-sysmmu.4", NULL), /* ROTATOR */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A20000, + "exynos-sysmmu.5", NULL), /* FIMC0 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A30000, + "exynos-sysmmu.6", NULL), /* FIMC1 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A40000, + "exynos-sysmmu.7", NULL), /* FIMC2 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A50000, + "exynos-sysmmu.8", NULL), /* FIMC3 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12A20000, + "exynos-sysmmu.9", NULL), /* G2D(4210) */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A40000, + "exynos-sysmmu.9", NULL), /* G2D(4x12) */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11E20000, + "exynos-sysmmu.10", NULL), /* FIMD0 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12220000, + "exynos-sysmmu.11", NULL), /* FIMD1(4210) */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12260000, + "exynos-sysmmu.12", NULL), /* IS0(4x12) */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x122B0000, + "exynos-sysmmu.13", NULL), /* IS1(4x12) */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x123B0000, + "exynos-sysmmu.14", NULL), /* FIMC-LITE0(4x12) */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x123C0000, + "exynos-sysmmu.15", NULL), /* FIMC-LITE1(4x12) */ {}, }; diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index 973a06637572..acaeb14db54b 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -109,6 +109,36 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { "samsung-i2s.1", NULL), OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D70000, "samsung-i2s.2", NULL), + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11210000, + "exynos-sysmmu.0", "mfc"), /* MFC_L */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11200000, + "exynos-sysmmu.1", "mfc"), /* MFC_R */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14650000, + "exynos-sysmmu.2", NULL), /* TV */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11F20000, + "exynos-sysmmu.3", "jpeg"), /* JPEG */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11D40000, + "exynos-sysmmu.4", NULL), /* ROTATOR */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E80000, + "exynos-sysmmu.5", "gscl"), /* GSCL0 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E90000, + "exynos-sysmmu.6", "gscl"), /* GSCL1 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EA0000, + "exynos-sysmmu.7", "gscl"), /* GSCL2 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EB0000, + "exynos-sysmmu.8", "gscl"), /* GSCL3 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13260000, + "exynos-sysmmu.9", NULL), /* FIMC-IS0 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x132C0000, + "exynos-sysmmu.10", NULL), /* FIMC-IS1 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14640000, + "exynos-sysmmu.11", NULL), /* FIMD1 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C40000, + "exynos-sysmmu.12", NULL), /* FIMC-LITE0 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C50000, + "exynos-sysmmu.13", NULL), /* FIMC-LITE1 */ + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A60000, + "exynos-sysmmu.14", NULL), /* G2D */ {}, }; diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 30ac79c7c687..8b85d4d8fab6 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -27,6 +27,7 @@ #include <linux/serial_sci.h> #include <linux/sh_dma.h> #include <linux/sh_timer.h> +#include <linux/platform_data/sh_ipmmu.h> #include <mach/dma-register.h> #include <mach/r8a7740.h> #include <mach/pm-rmobile.h> @@ -378,6 +379,37 @@ static struct platform_device tmu02_device = { .num_resources = ARRAY_SIZE(tmu02_resources), }; +/* IPMMUI (an IPMMU module for ICB/LMB) */ +static struct resource ipmmu_resources[] = { + [0] = { + .name = "IPMMUI", + .start = 0xfe951000, + .end = 0xfe9510ff, + .flags = IORESOURCE_MEM, + }, +}; + +static const char * const ipmmu_dev_names[] = { + "sh_mobile_lcdc_fb.0", + "sh_mobile_lcdc_fb.1", + "sh_mobile_ceu.0", +}; + +static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { + .dev_names = ipmmu_dev_names, + .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), +}; + +static struct platform_device ipmmu_device = { + .name = "ipmmu", + .id = -1, + .dev = { + .platform_data = &ipmmu_platform_data, + }, + .resource = ipmmu_resources, + .num_resources = ARRAY_SIZE(ipmmu_resources), +}; + static struct platform_device *r8a7740_early_devices[] __initdata = { &scif0_device, &scif1_device, @@ -392,6 +424,7 @@ static struct platform_device *r8a7740_early_devices[] __initdata = { &tmu00_device, &tmu01_device, &tmu02_device, + &ipmmu_device, }; /* DMA */ diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index d2079d5e3334..59c7146bf66f 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -33,6 +33,7 @@ #include <linux/sh_timer.h> #include <linux/pm_domain.h> #include <linux/dma-mapping.h> +#include <linux/platform_data/sh_ipmmu.h> #include <mach/dma-register.h> #include <mach/hardware.h> #include <mach/irqs.h> @@ -1008,6 +1009,43 @@ static struct platform_device spu1_device = { .num_resources = ARRAY_SIZE(spu1_resources), }; +/* IPMMUI (an IPMMU module for ICB/LMB) */ +static struct resource ipmmu_resources[] = { + [0] = { + .name = "IPMMUI", + .start = 0xfe951000, + .end = 0xfe9510ff, + .flags = IORESOURCE_MEM, + }, +}; + +static const char * const ipmmu_dev_names[] = { + "sh_mobile_lcdc_fb.0", + "sh_mobile_lcdc_fb.1", + "sh_mobile_ceu.0", + "uio_pdrv_genirq.0", + "uio_pdrv_genirq.1", + "uio_pdrv_genirq.2", + "uio_pdrv_genirq.3", + "uio_pdrv_genirq.4", + "uio_pdrv_genirq.5", +}; + +static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { + .dev_names = ipmmu_dev_names, + .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), +}; + +static struct platform_device ipmmu_device = { + .name = "ipmmu", + .id = -1, + .dev = { + .platform_data = &ipmmu_platform_data, + }, + .resource = ipmmu_resources, + .num_resources = ARRAY_SIZE(ipmmu_resources), +}; + static struct platform_device *sh7372_early_devices[] __initdata = { &scif0_device, &scif1_device, @@ -1019,6 +1057,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = { &cmt2_device, &tmu00_device, &tmu01_device, + &ipmmu_device, }; static struct platform_device *sh7372_late_devices[] __initdata = { diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 2ecd6681692f..bdab575f88bc 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -31,6 +31,7 @@ #include <linux/sh_dma.h> #include <linux/sh_intc.h> #include <linux/sh_timer.h> +#include <linux/platform_data/sh_ipmmu.h> #include <mach/dma-register.h> #include <mach/hardware.h> #include <mach/irqs.h> @@ -780,6 +781,35 @@ static struct platform_device pmu_device = { .resource = pmu_resources, }; +/* an IPMMU module for ICB */ +static struct resource ipmmu_resources[] = { + [0] = { + .name = "IPMMU", + .start = 0xfe951000, + .end = 0xfe9510ff, + .flags = IORESOURCE_MEM, + }, +}; + +static const char * const ipmmu_dev_names[] = { + "sh_mobile_lcdc_fb.0", +}; + +static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { + .dev_names = ipmmu_dev_names, + .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), +}; + +static struct platform_device ipmmu_device = { + .name = "ipmmu", + .id = -1, + .dev = { + .platform_data = &ipmmu_platform_data, + }, + .resource = ipmmu_resources, + .num_resources = ARRAY_SIZE(ipmmu_resources), +}; + static struct platform_device *sh73a0_early_devices_dt[] __initdata = { &scif0_device, &scif1_device, @@ -796,6 +826,7 @@ static struct platform_device *sh73a0_early_devices_dt[] __initdata = { static struct platform_device *sh73a0_early_devices[] __initdata = { &tmu00_device, &tmu01_device, + &ipmmu_device, }; static struct platform_device *sh73a0_late_devices[] __initdata = { diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 01068987809d..5c514d0711d1 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -158,7 +158,7 @@ config TEGRA_IOMMU_GART config TEGRA_IOMMU_SMMU bool "Tegra SMMU IOMMU Support" - depends on ARCH_TEGRA_3x_SOC && TEGRA_AHB + depends on ARCH_TEGRA && TEGRA_AHB select IOMMU_API help Enables support for remapping discontiguous physical memory @@ -187,4 +187,78 @@ config EXYNOS_IOMMU_DEBUG Say N unless you need kernel log message for IOMMU debugging +config SHMOBILE_IPMMU + bool + +config SHMOBILE_IPMMU_TLB + bool + +config SHMOBILE_IOMMU + bool "IOMMU for Renesas IPMMU/IPMMUI" + default n + depends on (ARM && ARCH_SHMOBILE) + select IOMMU_API + select ARM_DMA_USE_IOMMU + select SHMOBILE_IPMMU + select SHMOBILE_IPMMU_TLB + help + Support for Renesas IPMMU/IPMMUI. This option enables + remapping of DMA memory accesses from all of the IP blocks + on the ICB. + + Warning: Drivers (including userspace drivers of UIO + devices) of the IP blocks on the ICB *must* use addresses + allocated from the IPMMU (iova) for DMA with this option + enabled. + + If unsure, say N. + +choice + prompt "IPMMU/IPMMUI address space size" + default SHMOBILE_IOMMU_ADDRSIZE_2048MB + depends on SHMOBILE_IOMMU + help + This option sets IPMMU/IPMMUI address space size by + adjusting the 1st level page table size. The page table size + is calculated as follows: + + page table size = number of page table entries * 4 bytes + number of page table entries = address space size / 1 MiB + + For example, when the address space size is 2048 MiB, the + 1st level page table size is 8192 bytes. + + config SHMOBILE_IOMMU_ADDRSIZE_2048MB + bool "2 GiB" + + config SHMOBILE_IOMMU_ADDRSIZE_1024MB + bool "1 GiB" + + config SHMOBILE_IOMMU_ADDRSIZE_512MB + bool "512 MiB" + + config SHMOBILE_IOMMU_ADDRSIZE_256MB + bool "256 MiB" + + config SHMOBILE_IOMMU_ADDRSIZE_128MB + bool "128 MiB" + + config SHMOBILE_IOMMU_ADDRSIZE_64MB + bool "64 MiB" + + config SHMOBILE_IOMMU_ADDRSIZE_32MB + bool "32 MiB" + +endchoice + +config SHMOBILE_IOMMU_L1SIZE + int + default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB + default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB + default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB + default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB + default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB + default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB + default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB + endif # IOMMU_SUPPORT diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index f66b816d455c..ef0e5207ad69 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -13,3 +13,5 @@ obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o +obj-$(CONFIG_SHMOBILE_IOMMU) += shmobile-iommu.o +obj-$(CONFIG_SHMOBILE_IPMMU) += shmobile-ipmmu.o diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index d33eaaf783ad..98f555dafb55 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -3187,8 +3187,7 @@ int __init amd_iommu_init_dma_ops(void) free_domains: for_each_iommu(iommu) { - if (iommu->default_dom) - dma_ops_domain_free(iommu->default_dom); + dma_ops_domain_free(iommu->default_dom); } return ret; diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index faf10ba1ed9a..b6ecddb63cd0 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -1876,11 +1876,6 @@ static int amd_iommu_init_dma(void) struct amd_iommu *iommu; int ret; - init_device_table_dma(); - - for_each_iommu(iommu) - iommu_flush_all_caches(iommu); - if (iommu_pass_through) ret = amd_iommu_init_passthrough(); else @@ -1889,6 +1884,11 @@ static int amd_iommu_init_dma(void) if (ret) return ret; + init_device_table_dma(); + + for_each_iommu(iommu) + iommu_flush_all_caches(iommu); + amd_iommu_init_api(); amd_iommu_init_notifier(); diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 174bb654453d..dc7e478b7e5f 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -1042,7 +1042,7 @@ int dmar_enable_qi(struct intel_iommu *iommu) qi->desc = page_address(desc_page); - qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC); + qi->desc_status = kzalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC); if (!qi->desc_status) { free_page((unsigned long) qi->desc); kfree(qi); diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c index 7fe44f83cc37..238a3caa949a 100644 --- a/drivers/iommu/exynos-iommu.c +++ b/drivers/iommu/exynos-iommu.c @@ -511,7 +511,7 @@ int exynos_sysmmu_enable(struct device *dev, unsigned long pgtable) return ret; } -bool exynos_sysmmu_disable(struct device *dev) +static bool exynos_sysmmu_disable(struct device *dev) { struct sysmmu_drvdata *data = dev_get_drvdata(dev->archdata.iommu); bool disabled; diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index ddbdacad7768..b972d430d92b 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -734,7 +734,8 @@ int iommu_map(struct iommu_domain *domain, unsigned long iova, size_t orig_size = size; int ret = 0; - if (unlikely(domain->ops->map == NULL)) + if (unlikely(domain->ops->unmap == NULL || + domain->ops->pgsize_bitmap == 0UL)) return -ENODEV; /* find out the minimum page size supported */ @@ -808,7 +809,8 @@ size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size) size_t unmapped_page, unmapped = 0; unsigned int min_pagesz; - if (unlikely(domain->ops->unmap == NULL)) + if (unlikely(domain->ops->unmap == NULL || + domain->ops->pgsize_bitmap == 0UL)) return -ENODEV; /* find out the minimum page size supported */ @@ -850,6 +852,26 @@ size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, size_t size) } EXPORT_SYMBOL_GPL(iommu_unmap); + +int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, + phys_addr_t paddr, u64 size) +{ + if (unlikely(domain->ops->domain_window_enable == NULL)) + return -ENODEV; + + return domain->ops->domain_window_enable(domain, wnd_nr, paddr, size); +} +EXPORT_SYMBOL_GPL(iommu_domain_window_enable); + +void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr) +{ + if (unlikely(domain->ops->domain_window_disable == NULL)) + return; + + return domain->ops->domain_window_disable(domain, wnd_nr); +} +EXPORT_SYMBOL_GPL(iommu_domain_window_disable); + static int __init iommu_init(void) { iommu_group_kset = kset_create_and_add("iommu_groups", @@ -861,13 +883,15 @@ static int __init iommu_init(void) return 0; } -subsys_initcall(iommu_init); +arch_initcall(iommu_init); int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr attr, void *data) { struct iommu_domain_geometry *geometry; + bool *paging; int ret = 0; + u32 *count; switch (attr) { case DOMAIN_ATTR_GEOMETRY: @@ -875,6 +899,19 @@ int iommu_domain_get_attr(struct iommu_domain *domain, *geometry = domain->geometry; break; + case DOMAIN_ATTR_PAGING: + paging = data; + *paging = (domain->ops->pgsize_bitmap != 0UL); + break; + case DOMAIN_ATTR_WINDOWS: + count = data; + + if (domain->ops->domain_get_windows != NULL) + *count = domain->ops->domain_get_windows(domain); + else + ret = -ENODEV; + + break; default: if (!domain->ops->domain_get_attr) return -EINVAL; @@ -889,9 +926,26 @@ EXPORT_SYMBOL_GPL(iommu_domain_get_attr); int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr attr, void *data) { - if (!domain->ops->domain_set_attr) - return -EINVAL; + int ret = 0; + u32 *count; - return domain->ops->domain_set_attr(domain, attr, data); + switch (attr) { + case DOMAIN_ATTR_WINDOWS: + count = data; + + if (domain->ops->domain_set_windows != NULL) + ret = domain->ops->domain_set_windows(domain, *count); + else + ret = -ENODEV; + + break; + default: + if (domain->ops->domain_set_attr == NULL) + return -EINVAL; + + ret = domain->ops->domain_set_attr(domain, attr, data); + } + + return ret; } EXPORT_SYMBOL_GPL(iommu_domain_set_attr); diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index d33c980e9c20..6ac02fa5910f 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -146,7 +146,7 @@ static int iommu_enable(struct omap_iommu *obj) struct platform_device *pdev = to_platform_device(obj->dev); struct iommu_platform_data *pdata = pdev->dev.platform_data; - if (!obj || !pdata) + if (!pdata) return -EINVAL; if (!arch_iommu) @@ -172,7 +172,7 @@ static void iommu_disable(struct omap_iommu *obj) struct platform_device *pdev = to_platform_device(obj->dev); struct iommu_platform_data *pdata = pdev->dev.platform_data; - if (!obj || !pdata) + if (!pdata) return; arch_iommu->disable(obj); diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c new file mode 100644 index 000000000000..b6e8b57cf0a8 --- /dev/null +++ b/drivers/iommu/shmobile-iommu.c @@ -0,0 +1,395 @@ +/* + * IOMMU for IPMMU/IPMMUI + * Copyright (C) 2012 Hideki EIRAKU + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#include <linux/dma-mapping.h> +#include <linux/io.h> +#include <linux/iommu.h> +#include <linux/platform_device.h> +#include <linux/sizes.h> +#include <linux/slab.h> +#include <asm/dma-iommu.h> +#include "shmobile-ipmmu.h" + +#define L1_SIZE CONFIG_SHMOBILE_IOMMU_L1SIZE +#define L1_LEN (L1_SIZE / 4) +#define L1_ALIGN L1_SIZE +#define L2_SIZE SZ_1K +#define L2_LEN (L2_SIZE / 4) +#define L2_ALIGN L2_SIZE + +struct shmobile_iommu_domain_pgtable { + uint32_t *pgtable; + dma_addr_t handle; +}; + +struct shmobile_iommu_archdata { + struct list_head attached_list; + struct dma_iommu_mapping *iommu_mapping; + spinlock_t attach_lock; + struct shmobile_iommu_domain *attached; + int num_attached_devices; + struct shmobile_ipmmu *ipmmu; +}; + +struct shmobile_iommu_domain { + struct shmobile_iommu_domain_pgtable l1, l2[L1_LEN]; + spinlock_t map_lock; + spinlock_t attached_list_lock; + struct list_head attached_list; +}; + +static struct shmobile_iommu_archdata *ipmmu_archdata; +static struct kmem_cache *l1cache, *l2cache; + +static int pgtable_alloc(struct shmobile_iommu_domain_pgtable *pgtable, + struct kmem_cache *cache, size_t size) +{ + pgtable->pgtable = kmem_cache_zalloc(cache, GFP_ATOMIC); + if (!pgtable->pgtable) + return -ENOMEM; + pgtable->handle = dma_map_single(NULL, pgtable->pgtable, size, + DMA_TO_DEVICE); + return 0; +} + +static void pgtable_free(struct shmobile_iommu_domain_pgtable *pgtable, + struct kmem_cache *cache, size_t size) +{ + dma_unmap_single(NULL, pgtable->handle, size, DMA_TO_DEVICE); + kmem_cache_free(cache, pgtable->pgtable); +} + +static uint32_t pgtable_read(struct shmobile_iommu_domain_pgtable *pgtable, + unsigned int index) +{ + return pgtable->pgtable[index]; +} + +static void pgtable_write(struct shmobile_iommu_domain_pgtable *pgtable, + unsigned int index, unsigned int count, uint32_t val) +{ + unsigned int i; + + for (i = 0; i < count; i++) + pgtable->pgtable[index + i] = val; + dma_sync_single_for_device(NULL, pgtable->handle + index * sizeof(val), + sizeof(val) * count, DMA_TO_DEVICE); +} + +static int shmobile_iommu_domain_init(struct iommu_domain *domain) +{ + struct shmobile_iommu_domain *sh_domain; + int i, ret; + + sh_domain = kmalloc(sizeof(*sh_domain), GFP_KERNEL); + if (!sh_domain) + return -ENOMEM; + ret = pgtable_alloc(&sh_domain->l1, l1cache, L1_SIZE); + if (ret < 0) { + kfree(sh_domain); + return ret; + } + for (i = 0; i < L1_LEN; i++) + sh_domain->l2[i].pgtable = NULL; + spin_lock_init(&sh_domain->map_lock); + spin_lock_init(&sh_domain->attached_list_lock); + INIT_LIST_HEAD(&sh_domain->attached_list); + domain->priv = sh_domain; + return 0; +} + +static void shmobile_iommu_domain_destroy(struct iommu_domain *domain) +{ + struct shmobile_iommu_domain *sh_domain = domain->priv; + int i; + + for (i = 0; i < L1_LEN; i++) { + if (sh_domain->l2[i].pgtable) + pgtable_free(&sh_domain->l2[i], l2cache, L2_SIZE); + } + pgtable_free(&sh_domain->l1, l1cache, L1_SIZE); + kfree(sh_domain); + domain->priv = NULL; +} + +static int shmobile_iommu_attach_device(struct iommu_domain *domain, + struct device *dev) +{ + struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; + struct shmobile_iommu_domain *sh_domain = domain->priv; + int ret = -EBUSY; + + if (!archdata) + return -ENODEV; + spin_lock(&sh_domain->attached_list_lock); + spin_lock(&archdata->attach_lock); + if (archdata->attached != sh_domain) { + if (archdata->attached) + goto err; + ipmmu_tlb_set(archdata->ipmmu, sh_domain->l1.handle, L1_SIZE, + 0); + ipmmu_tlb_flush(archdata->ipmmu); + archdata->attached = sh_domain; + archdata->num_attached_devices = 0; + list_add(&archdata->attached_list, &sh_domain->attached_list); + } + archdata->num_attached_devices++; + ret = 0; +err: + spin_unlock(&archdata->attach_lock); + spin_unlock(&sh_domain->attached_list_lock); + return ret; +} + +static void shmobile_iommu_detach_device(struct iommu_domain *domain, + struct device *dev) +{ + struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; + struct shmobile_iommu_domain *sh_domain = domain->priv; + + if (!archdata) + return; + spin_lock(&sh_domain->attached_list_lock); + spin_lock(&archdata->attach_lock); + archdata->num_attached_devices--; + if (!archdata->num_attached_devices) { + ipmmu_tlb_set(archdata->ipmmu, 0, 0, 0); + ipmmu_tlb_flush(archdata->ipmmu); + archdata->attached = NULL; + list_del(&archdata->attached_list); + } + spin_unlock(&archdata->attach_lock); + spin_unlock(&sh_domain->attached_list_lock); +} + +static void domain_tlb_flush(struct shmobile_iommu_domain *sh_domain) +{ + struct shmobile_iommu_archdata *archdata; + + spin_lock(&sh_domain->attached_list_lock); + list_for_each_entry(archdata, &sh_domain->attached_list, attached_list) + ipmmu_tlb_flush(archdata->ipmmu); + spin_unlock(&sh_domain->attached_list_lock); +} + +static int l2alloc(struct shmobile_iommu_domain *sh_domain, + unsigned int l1index) +{ + int ret; + + if (!sh_domain->l2[l1index].pgtable) { + ret = pgtable_alloc(&sh_domain->l2[l1index], l2cache, L2_SIZE); + if (ret < 0) + return ret; + } + pgtable_write(&sh_domain->l1, l1index, 1, + sh_domain->l2[l1index].handle | 0x1); + return 0; +} + +static void l2realfree(struct shmobile_iommu_domain_pgtable *l2) +{ + if (l2->pgtable) + pgtable_free(l2, l2cache, L2_SIZE); +} + +static void l2free(struct shmobile_iommu_domain *sh_domain, + unsigned int l1index, + struct shmobile_iommu_domain_pgtable *l2) +{ + pgtable_write(&sh_domain->l1, l1index, 1, 0); + if (sh_domain->l2[l1index].pgtable) { + *l2 = sh_domain->l2[l1index]; + sh_domain->l2[l1index].pgtable = NULL; + } +} + +static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova, + phys_addr_t paddr, size_t size, int prot) +{ + struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL }; + struct shmobile_iommu_domain *sh_domain = domain->priv; + unsigned int l1index, l2index; + int ret; + + l1index = iova >> 20; + switch (size) { + case SZ_4K: + l2index = (iova >> 12) & 0xff; + spin_lock(&sh_domain->map_lock); + ret = l2alloc(sh_domain, l1index); + if (!ret) + pgtable_write(&sh_domain->l2[l1index], l2index, 1, + paddr | 0xff2); + spin_unlock(&sh_domain->map_lock); + break; + case SZ_64K: + l2index = (iova >> 12) & 0xf0; + spin_lock(&sh_domain->map_lock); + ret = l2alloc(sh_domain, l1index); + if (!ret) + pgtable_write(&sh_domain->l2[l1index], l2index, 0x10, + paddr | 0xff1); + spin_unlock(&sh_domain->map_lock); + break; + case SZ_1M: + spin_lock(&sh_domain->map_lock); + l2free(sh_domain, l1index, &l2); + pgtable_write(&sh_domain->l1, l1index, 1, paddr | 0xc02); + spin_unlock(&sh_domain->map_lock); + ret = 0; + break; + default: + ret = -EINVAL; + } + if (!ret) + domain_tlb_flush(sh_domain); + l2realfree(&l2); + return ret; +} + +static size_t shmobile_iommu_unmap(struct iommu_domain *domain, + unsigned long iova, size_t size) +{ + struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL }; + struct shmobile_iommu_domain *sh_domain = domain->priv; + unsigned int l1index, l2index; + uint32_t l2entry = 0; + size_t ret = 0; + + l1index = iova >> 20; + if (!(iova & 0xfffff) && size >= SZ_1M) { + spin_lock(&sh_domain->map_lock); + l2free(sh_domain, l1index, &l2); + spin_unlock(&sh_domain->map_lock); + ret = SZ_1M; + goto done; + } + l2index = (iova >> 12) & 0xff; + spin_lock(&sh_domain->map_lock); + if (sh_domain->l2[l1index].pgtable) + l2entry = pgtable_read(&sh_domain->l2[l1index], l2index); + switch (l2entry & 3) { + case 1: + if (l2index & 0xf) + break; + pgtable_write(&sh_domain->l2[l1index], l2index, 0x10, 0); + ret = SZ_64K; + break; + case 2: + pgtable_write(&sh_domain->l2[l1index], l2index, 1, 0); + ret = SZ_4K; + break; + } + spin_unlock(&sh_domain->map_lock); +done: + if (ret) + domain_tlb_flush(sh_domain); + l2realfree(&l2); + return ret; +} + +static phys_addr_t shmobile_iommu_iova_to_phys(struct iommu_domain *domain, + unsigned long iova) +{ + struct shmobile_iommu_domain *sh_domain = domain->priv; + uint32_t l1entry = 0, l2entry = 0; + unsigned int l1index, l2index; + + l1index = iova >> 20; + l2index = (iova >> 12) & 0xff; + spin_lock(&sh_domain->map_lock); + if (sh_domain->l2[l1index].pgtable) + l2entry = pgtable_read(&sh_domain->l2[l1index], l2index); + else + l1entry = pgtable_read(&sh_domain->l1, l1index); + spin_unlock(&sh_domain->map_lock); + switch (l2entry & 3) { + case 1: + return (l2entry & ~0xffff) | (iova & 0xffff); + case 2: + return (l2entry & ~0xfff) | (iova & 0xfff); + default: + if ((l1entry & 3) == 2) + return (l1entry & ~0xfffff) | (iova & 0xfffff); + return 0; + } +} + +static int find_dev_name(struct shmobile_ipmmu *ipmmu, const char *dev_name) +{ + unsigned int i, n = ipmmu->num_dev_names; + + for (i = 0; i < n; i++) { + if (strcmp(ipmmu->dev_names[i], dev_name) == 0) + return 1; + } + return 0; +} + +static int shmobile_iommu_add_device(struct device *dev) +{ + struct shmobile_iommu_archdata *archdata = ipmmu_archdata; + struct dma_iommu_mapping *mapping; + + if (!find_dev_name(archdata->ipmmu, dev_name(dev))) + return 0; + mapping = archdata->iommu_mapping; + if (!mapping) { + mapping = arm_iommu_create_mapping(&platform_bus_type, 0, + L1_LEN << 20, 0); + if (IS_ERR(mapping)) + return PTR_ERR(mapping); + archdata->iommu_mapping = mapping; + } + dev->archdata.iommu = archdata; + if (arm_iommu_attach_device(dev, mapping)) + pr_err("arm_iommu_attach_device failed\n"); + return 0; +} + +static struct iommu_ops shmobile_iommu_ops = { + .domain_init = shmobile_iommu_domain_init, + .domain_destroy = shmobile_iommu_domain_destroy, + .attach_dev = shmobile_iommu_attach_device, + .detach_dev = shmobile_iommu_detach_device, + .map = shmobile_iommu_map, + .unmap = shmobile_iommu_unmap, + .iova_to_phys = shmobile_iommu_iova_to_phys, + .add_device = shmobile_iommu_add_device, + .pgsize_bitmap = SZ_1M | SZ_64K | SZ_4K, +}; + +int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu) +{ + static struct shmobile_iommu_archdata *archdata; + + l1cache = kmem_cache_create("shmobile-iommu-pgtable1", L1_SIZE, + L1_ALIGN, SLAB_HWCACHE_ALIGN, NULL); + if (!l1cache) + return -ENOMEM; + l2cache = kmem_cache_create("shmobile-iommu-pgtable2", L2_SIZE, + L2_ALIGN, SLAB_HWCACHE_ALIGN, NULL); + if (!l2cache) { + kmem_cache_destroy(l1cache); + return -ENOMEM; + } + archdata = kmalloc(sizeof(*archdata), GFP_KERNEL); + if (!archdata) { + kmem_cache_destroy(l1cache); + kmem_cache_destroy(l2cache); + return -ENOMEM; + } + spin_lock_init(&archdata->attach_lock); + archdata->attached = NULL; + archdata->ipmmu = ipmmu; + ipmmu_archdata = archdata; + bus_set_iommu(&platform_bus_type, &shmobile_iommu_ops); + return 0; +} diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c new file mode 100644 index 000000000000..8321f89596c4 --- /dev/null +++ b/drivers/iommu/shmobile-ipmmu.c @@ -0,0 +1,136 @@ +/* + * IPMMU/IPMMUI + * Copyright (C) 2012 Hideki EIRAKU + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#include <linux/err.h> +#include <linux/export.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/platform_data/sh_ipmmu.h> +#include "shmobile-ipmmu.h" + +#define IMCTR1 0x000 +#define IMCTR2 0x004 +#define IMASID 0x010 +#define IMTTBR 0x014 +#define IMTTBCR 0x018 + +#define IMCTR1_TLBEN (1 << 0) +#define IMCTR1_FLUSH (1 << 1) + +static void ipmmu_reg_write(struct shmobile_ipmmu *ipmmu, unsigned long reg_off, + unsigned long data) +{ + iowrite32(data, ipmmu->ipmmu_base + reg_off); +} + +void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu) +{ + if (!ipmmu) + return; + + mutex_lock(&ipmmu->flush_lock); + if (ipmmu->tlb_enabled) + ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH | IMCTR1_TLBEN); + else + ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH); + mutex_unlock(&ipmmu->flush_lock); +} + +void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size, + int asid) +{ + if (!ipmmu) + return; + + mutex_lock(&ipmmu->flush_lock); + switch (size) { + default: + ipmmu->tlb_enabled = 0; + break; + case 0x2000: + ipmmu_reg_write(ipmmu, IMTTBCR, 1); + ipmmu->tlb_enabled = 1; + break; + case 0x1000: + ipmmu_reg_write(ipmmu, IMTTBCR, 2); + ipmmu->tlb_enabled = 1; + break; + case 0x800: + ipmmu_reg_write(ipmmu, IMTTBCR, 3); + ipmmu->tlb_enabled = 1; + break; + case 0x400: + ipmmu_reg_write(ipmmu, IMTTBCR, 4); + ipmmu->tlb_enabled = 1; + break; + case 0x200: + ipmmu_reg_write(ipmmu, IMTTBCR, 5); + ipmmu->tlb_enabled = 1; + break; + case 0x100: + ipmmu_reg_write(ipmmu, IMTTBCR, 6); + ipmmu->tlb_enabled = 1; + break; + case 0x80: + ipmmu_reg_write(ipmmu, IMTTBCR, 7); + ipmmu->tlb_enabled = 1; + break; + } + ipmmu_reg_write(ipmmu, IMTTBR, phys); + ipmmu_reg_write(ipmmu, IMASID, asid); + mutex_unlock(&ipmmu->flush_lock); +} + +static int ipmmu_probe(struct platform_device *pdev) +{ + struct shmobile_ipmmu *ipmmu; + struct resource *res; + struct shmobile_ipmmu_platform_data *pdata = pdev->dev.platform_data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "cannot get platform resources\n"); + return -ENOENT; + } + ipmmu = devm_kzalloc(&pdev->dev, sizeof(*ipmmu), GFP_KERNEL); + if (!ipmmu) { + dev_err(&pdev->dev, "cannot allocate device data\n"); + return -ENOMEM; + } + mutex_init(&ipmmu->flush_lock); + ipmmu->dev = &pdev->dev; + ipmmu->ipmmu_base = devm_ioremap_nocache(&pdev->dev, res->start, + resource_size(res)); + if (!ipmmu->ipmmu_base) { + dev_err(&pdev->dev, "ioremap_nocache failed\n"); + return -ENOMEM; + } + ipmmu->dev_names = pdata->dev_names; + ipmmu->num_dev_names = pdata->num_dev_names; + platform_set_drvdata(pdev, ipmmu); + ipmmu_reg_write(ipmmu, IMCTR1, 0x0); /* disable TLB */ + ipmmu_reg_write(ipmmu, IMCTR2, 0x0); /* disable PMB */ + ipmmu_iommu_init(ipmmu); + return 0; +} + +static struct platform_driver ipmmu_driver = { + .probe = ipmmu_probe, + .driver = { + .owner = THIS_MODULE, + .name = "ipmmu", + }, +}; + +static int __init ipmmu_init(void) +{ + return platform_driver_register(&ipmmu_driver); +} +subsys_initcall(ipmmu_init); diff --git a/drivers/iommu/shmobile-ipmmu.h b/drivers/iommu/shmobile-ipmmu.h new file mode 100644 index 000000000000..4d53684673e1 --- /dev/null +++ b/drivers/iommu/shmobile-ipmmu.h @@ -0,0 +1,34 @@ +/* shmobile-ipmmu.h + * + * Copyright (C) 2012 Hideki EIRAKU + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#ifndef __SHMOBILE_IPMMU_H__ +#define __SHMOBILE_IPMMU_H__ + +struct shmobile_ipmmu { + struct device *dev; + void __iomem *ipmmu_base; + int tlb_enabled; + struct mutex flush_lock; + const char * const *dev_names; + unsigned int num_dev_names; +}; + +#ifdef CONFIG_SHMOBILE_IPMMU_TLB +void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu); +void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size, + int asid); +int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu); +#else +static inline int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu) +{ + return -EINVAL; +} +#endif + +#endif /* __SHMOBILE_IPMMU_H__ */ diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index 8219f1d596ee..86437575f94d 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c @@ -430,13 +430,11 @@ const struct dev_pm_ops tegra_gart_pm_ops = { .resume = tegra_gart_resume, }; -#ifdef CONFIG_OF static struct of_device_id tegra_gart_of_match[] = { { .compatible = "nvidia,tegra20-gart", }, { }, }; MODULE_DEVICE_TABLE(of, tegra_gart_of_match); -#endif static struct platform_driver tegra_gart_driver = { .probe = tegra_gart_probe, @@ -445,7 +443,7 @@ static struct platform_driver tegra_gart_driver = { .owner = THIS_MODULE, .name = "tegra-gart", .pm = &tegra_gart_pm_ops, - .of_match_table = of_match_ptr(tegra_gart_of_match), + .of_match_table = tegra_gart_of_match, }, }; diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index f08dbcd2f175..eb0109f98946 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -1,7 +1,7 @@ /* * IOMMU API for SMMU in Tegra30 * - * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -294,7 +294,11 @@ struct smmu_debugfs_info { * Per SMMU device - IOMMU device */ struct smmu_device { - void __iomem *regs[NUM_SMMU_REG_BANKS]; + void __iomem *regbase; /* register offset base */ + void __iomem **regs; /* register block start address array */ + void __iomem **rege; /* register block end address array */ + int nregs; /* number of register blocks */ + unsigned long iovmm_base; /* remappable base address */ unsigned long page_count; /* total remappable size */ spinlock_t lock; @@ -324,38 +328,37 @@ static struct smmu_device *smmu_handle; /* unique for a system */ /* * SMMU register accessors */ +static bool inline smmu_valid_reg(struct smmu_device *smmu, + void __iomem *addr) +{ + int i; + + for (i = 0; i < smmu->nregs; i++) { + if (addr < smmu->regs[i]) + break; + if (addr <= smmu->rege[i]) + return true; + } + + return false; +} + static inline u32 smmu_read(struct smmu_device *smmu, size_t offs) { - BUG_ON(offs < 0x10); - if (offs < 0x3c) - return readl(smmu->regs[0] + offs - 0x10); - BUG_ON(offs < 0x1f0); - if (offs < 0x200) - return readl(smmu->regs[1] + offs - 0x1f0); - BUG_ON(offs < 0x228); - if (offs < 0x284) - return readl(smmu->regs[2] + offs - 0x228); - BUG(); + void __iomem *addr = smmu->regbase + offs; + + BUG_ON(!smmu_valid_reg(smmu, addr)); + + return readl(addr); } static inline void smmu_write(struct smmu_device *smmu, u32 val, size_t offs) { - BUG_ON(offs < 0x10); - if (offs < 0x3c) { - writel(val, smmu->regs[0] + offs - 0x10); - return; - } - BUG_ON(offs < 0x1f0); - if (offs < 0x200) { - writel(val, smmu->regs[1] + offs - 0x1f0); - return; - } - BUG_ON(offs < 0x228); - if (offs < 0x284) { - writel(val, smmu->regs[2] + offs - 0x228); - return; - } - BUG(); + void __iomem *addr = smmu->regbase + offs; + + BUG_ON(!smmu_valid_reg(smmu, addr)); + + writel(val, addr); } #define VA_PAGE_TO_PA(va, page) \ @@ -1171,7 +1174,13 @@ static int tegra_smmu_probe(struct platform_device *pdev) return -ENOMEM; } - for (i = 0; i < ARRAY_SIZE(smmu->regs); i++) { + smmu->nregs = pdev->num_resources; + smmu->regs = devm_kzalloc(dev, 2 * smmu->nregs * sizeof(*smmu->regs), + GFP_KERNEL); + smmu->rege = smmu->regs + smmu->nregs; + if (!smmu->regs) + return -ENOMEM; + for (i = 0; i < smmu->nregs; i++) { struct resource *res; res = platform_get_resource(pdev, IORESOURCE_MEM, i); @@ -1180,7 +1189,10 @@ static int tegra_smmu_probe(struct platform_device *pdev) smmu->regs[i] = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(smmu->regs[i])) return PTR_ERR(smmu->regs[i]); + smmu->rege[i] = smmu->regs[i] + resource_size(res) - 1; } + /* Same as "mc" 1st regiter block start address */ + smmu->regbase = (void __iomem *)((u32)smmu->regs[0] & PAGE_MASK); err = of_get_dma_window(dev->of_node, NULL, 0, NULL, &base, &size); if (err) @@ -1217,6 +1229,7 @@ static int tegra_smmu_probe(struct platform_device *pdev) as->pte_attr = _PTE_ATTR; spin_lock_init(&as->lock); + spin_lock_init(&as->client_lock); INIT_LIST_HEAD(&as->client); } spin_lock_init(&smmu->lock); @@ -1255,13 +1268,11 @@ const struct dev_pm_ops tegra_smmu_pm_ops = { .resume = tegra_smmu_resume, }; -#ifdef CONFIG_OF static struct of_device_id tegra_smmu_of_match[] = { { .compatible = "nvidia,tegra30-smmu", }, { }, }; MODULE_DEVICE_TABLE(of, tegra_smmu_of_match); -#endif static struct platform_driver tegra_smmu_driver = { .probe = tegra_smmu_probe, @@ -1270,7 +1281,7 @@ static struct platform_driver tegra_smmu_driver = { .owner = THIS_MODULE, .name = "tegra-smmu", .pm = &tegra_smmu_pm_ops, - .of_match_table = of_match_ptr(tegra_smmu_of_match), + .of_match_table = tegra_smmu_of_match, }, }; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index f3b99e1c1042..ba3b8a98a049 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -58,8 +58,10 @@ struct iommu_domain { #define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */ enum iommu_attr { - DOMAIN_ATTR_MAX, DOMAIN_ATTR_GEOMETRY, + DOMAIN_ATTR_PAGING, + DOMAIN_ATTR_WINDOWS, + DOMAIN_ATTR_MAX, }; #ifdef CONFIG_IOMMU_API @@ -100,6 +102,16 @@ struct iommu_ops { enum iommu_attr attr, void *data); int (*domain_set_attr)(struct iommu_domain *domain, enum iommu_attr attr, void *data); + + /* Window handling functions */ + int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, + phys_addr_t paddr, u64 size); + void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); + /* Set the numer of window per domain */ + int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); + /* Get the numer of window per domain */ + u32 (*domain_get_windows)(struct iommu_domain *domain); + unsigned long pgsize_bitmap; }; @@ -157,6 +169,10 @@ extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, void *data); +/* Window handling function prototypes */ +extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, + phys_addr_t offset, u64 size); +extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); /** * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework * @domain: the iommu domain where the fault has happened @@ -239,6 +255,18 @@ static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, return -ENODEV; } +static inline int iommu_domain_window_enable(struct iommu_domain *domain, + u32 wnd_nr, phys_addr_t paddr, + u64 size) +{ + return -ENODEV; +} + +static inline void iommu_domain_window_disable(struct iommu_domain *domain, + u32 wnd_nr) +{ +} + static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, unsigned long iova) { diff --git a/include/linux/platform_data/sh_ipmmu.h b/include/linux/platform_data/sh_ipmmu.h new file mode 100644 index 000000000000..39f7405cdac5 --- /dev/null +++ b/include/linux/platform_data/sh_ipmmu.h @@ -0,0 +1,18 @@ +/* sh_ipmmu.h + * + * Copyright (C) 2012 Hideki EIRAKU + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ + +#ifndef __SH_IPMMU_H__ +#define __SH_IPMMU_H__ + +struct shmobile_ipmmu_platform_data { + const char * const *dev_names; + unsigned int num_dev_names; +}; + +#endif /* __SH_IPMMU_H__ */ |