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| author | Shunli Wang <shunli.wang@mediatek.com> | 2019-05-16 17:54:38 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-05-16 11:13:21 +0100 |
| commit | cf61f5b01531a2b64b875894fa97aa891d39e871 (patch) | |
| tree | c5d3918be40107865d8ed14dab9a52a023287d33 /sound/soc/mediatek | |
| parent | 1628fc3f47717fc3c8d9cd5fd6c7bc7d3796927d (diff) | |
| download | linux-cf61f5b01531a2b64b875894fa97aa891d39e871.tar.gz | |
ASoC: Mediatek: MT8183: set data align
This patch sets register and bit information about data align for every memory interface. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/mediatek')
| -rw-r--r-- | sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c index 1bc0fafe5e29..ab2bce1d9b3d 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c @@ -437,7 +437,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL1_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL1_HD_SFT, + .hd_align_mshift = DL1_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -456,7 +458,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL2_HD_SFT, + .hd_align_mshift = DL2_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -475,7 +479,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL3_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL3_HD_SFT, + .hd_align_mshift = DL3_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -494,7 +500,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = VUL2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL2_HD_SFT, + .hd_align_mshift = VUL2_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -513,7 +521,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = AWB_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB_HD_SFT, + .hd_align_mshift = AWB_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -532,7 +542,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = AWB2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB2_HD_SFT, + .hd_align_mshift = AWB2_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -551,7 +563,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = VUL12_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL12_HD_SFT, + .hd_align_mshift = VUL12_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -570,7 +584,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = MOD_DAI_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = MOD_DAI_HD_SFT, + .hd_align_mshift = MOD_DAI_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -589,7 +605,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = -1, /* control in tdm for sync start */ .enable_shift = -1, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = HDMI_HD_SFT, + .hd_align_mshift = HDMI_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, |