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authorTom Lendacky <thomas.lendacky@amd.com>2020-12-10 11:10:06 -0600
committerPaolo Bonzini <pbonzini@redhat.com>2020-12-15 05:20:58 -0500
commit376c6d285017419e35c7177bc60abe7915fb7497 (patch)
tree4ce881fdb0d064fc03936b83d9acd9b221da7316 /scripts
parent80675b3ad45f79d97ce47a0faac3a6d22ab7e876 (diff)
downloadlinux-376c6d285017419e35c7177bc60abe7915fb7497.tar.gz
KVM: SVM: Provide support for SEV-ES vCPU creation/loading
An SEV-ES vCPU requires additional VMCB initialization requirements for
vCPU creation and vCPU load/put requirements. This includes:

General VMCB initialization changes:
  - Set a VMCB control bit to enable SEV-ES support on the vCPU.
  - Set the VMCB encrypted VM save area address.
  - CRx registers are part of the encrypted register state and cannot be
    updated. Remove the CRx register read and write intercepts and replace
    them with CRx register write traps to track the CRx register values.
  - Certain MSR values are part of the encrypted register state and cannot
    be updated. Remove certain MSR intercepts (EFER, CR_PAT, etc.).
  - Remove the #GP intercept (no support for "enable_vmware_backdoor").
  - Remove the XSETBV intercept since the hypervisor cannot modify XCR0.

General vCPU creation changes:
  - Set the initial GHCB gpa value as per the GHCB specification.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <3a8aef366416eddd5556dfa3fdc212aafa1ad0a2.1607620209.git.thomas.lendacky@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts')
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