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authorNicolas Pitre <nico@fluxnic.net>2020-11-30 22:42:36 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2020-12-08 10:15:52 +0000
commite64ab473dddaffdfc4bd0b385204f472f2cb00d6 (patch)
tree49e66b2ec21ae80dbf3ac2a54c6e2204e1b3f73b /kernel/tsacct.c
parent9fa2e7af3d53a4b769136eccc32c02e128a4ee51 (diff)
downloadlinux-e64ab473dddaffdfc4bd0b385204f472f2cb00d6.tar.gz
ARM: 9034/1: __div64_32(): straighten up inline asm constraints
The ARM version of __div64_32() encapsulates a call to __do_div64 with
non-standard argument passing. In particular, __n is a 64-bit input
argument assigned to r0-r1 and __rem is an output argument sharing half
of that r0-r1 register pair.

With __n being an input argument, the compiler is in its right to
presume that r0-r1 would still hold the value of __n past the inline
assembly statement. Normally, the compiler would have assigned non
overlapping registers to __n and __rem if the value for __n is needed
again.

However, here we enforce our own register assignment and gcc fails to
notice the conflict. In practice this doesn't cause any problem as __n
is considered dead after the asm statement and *n is overwritten.
However this is not always guaranteed and clang rightfully complains.

Let's fix it properly by making __n into an input-output variable. This
makes it clear that those registers representing __n have been modified.
Then we can extract __rem as the high part of __n with plain C code.

This asm constraint "abuse" was likely relied upon back when gcc didn't
handle 64-bit values optimally. Turns out that gcc is now able to
optimize things and produces the same code with this patch applied.

Reported-by: Antony Yu <swpenim@gmail.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'kernel/tsacct.c')
0 files changed, 0 insertions, 0 deletions