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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-17 17:27:33 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-17 17:27:33 -0700 |
commit | ea982ba7f79141d86eb7a440fcba6796ed718b9b (patch) | |
tree | a9737e538564902f6bdcd11efa20dab13e27484c /include | |
parent | 7ad67ca5534ee7c958559c4ad610f05c4578e361 (diff) | |
parent | b46119796721301e410a357b91195eed46980ea6 (diff) | |
download | linux-ea982ba7f79141d86eb7a440fcba6796ed718b9b.tar.gz |
Merge tag 'mmc-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson: "MMC core: - Fixup processing of SDIO IRQs during system suspend/resume - Add helper function to indicate if SDIO IRQs is enabled MMC host: - bcm2835: Take SWIOTLB memory size limitation into account - dw_mmc: Improve SDIO IRQs support - mtk-sd: Various improvements - mtk-sd: Improve SDIO IRQs support - sdhci-iproc: Add support for emmc2 of the BCM2711 - sdhci-of-arasan: Add Support for Intel LGM eMMC - sdhci-of-aspeed: Add support for the ASPEED SD controller - sdhci-of-esdhc: Deal with erratum A011334 support in ls1028a 1.0 SoC - sdhci-pci: Prepare to add support of Genesys Logic GL975x - sdhci-pci: Add another Id for Intel CML - sdhci-pci-o2micro: Fix O2 Host data read/write DLL Lock phase shift issue - sunxi: Add support for H5 compatibles" * tag 'mmc-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (59 commits) ms_block: fix spelling mistake "randomally" -> "randomly" mmc: dw_mmc: hi3798cv200: make array degrees static const, makes object smaller mmc: sdhci: Convert to use sdio_irq_claimed() mmc: sdhci: Drop redundant code for SDIO IRQs mmc: sdhci: Drop redundant check in sdhci_ack_sdio_irq() mmc: core: Fixup processing of SDIO IRQs during system suspend/resume mmc: core: WARN if SDIO IRQs are enabled for non-powered card in suspend mmc: core: Clarify that the ->ack_sdio_irq() callback is mandatory mmc: core: Clarify sdio_irq_pending flag for MMC_CAP2_SDIO_IRQ_NOTHREAD mmc: core: Move code to get pending SDIO IRQs to a function mmc: mtk-sd: Re-store SDIO IRQs mask at system resume mmc: dw_mmc: Re-store SDIO IRQs mask at system resume mmc: core: Add helper function to indicate if SDIO IRQs is enabled mmc: sdhci-pci-o2micro: Fix O2 Host data read/write DLL Lock phase shift issue mmc: sdhci-pci-o2micro: Move functions in preparation to fix DLL lock phase shift issue mmc: sdhci-pci-o2micro: Change O2 Host PLL and DLL register name mmc: sdhci: Fix incorrect switch to HS mode mmc: sdhci-of-aspeed: Depend on CONFIG_OF_ADDRESS mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock() ...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mmc/host.h | 10 | ||||
-rw-r--r-- | include/linux/pci_ids.h | 2 |
2 files changed, 12 insertions, 0 deletions
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 4a351cb7f20f..4704b77259ee 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -128,6 +128,7 @@ struct mmc_host_ops { int (*get_cd)(struct mmc_host *host); void (*enable_sdio_irq)(struct mmc_host *host, int enable); + /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */ void (*ack_sdio_irq)(struct mmc_host *host); /* optional callback for HC quirks */ @@ -493,6 +494,15 @@ void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq); void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq); +/* + * May be called from host driver's system/runtime suspend/resume callbacks, + * to know if SDIO IRQs has been claimed. + */ +static inline bool sdio_irq_claimed(struct mmc_host *host) +{ + return host->sdio_irqs > 0; +} + static inline void mmc_signal_sdio_irq(struct mmc_host *host) { host->ops->enable_sdio_irq(host, 0); diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 24486f405f12..d45122800585 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2405,6 +2405,8 @@ #define PCI_DEVICE_ID_RDC_R6061 0x6061 #define PCI_DEVICE_ID_RDC_D1010 0x1010 +#define PCI_VENDOR_ID_GLI 0x17a0 + #define PCI_VENDOR_ID_LENOVO 0x17aa #define PCI_VENDOR_ID_QCOM 0x17cb |