summary refs log tree commit diff
path: root/include/uapi
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2021-02-22 09:19:08 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2021-02-22 09:19:08 -0800
commita2590d69893f232cbb79d149dbbb456a1febca22 (patch)
tree870326105cf0ff810fe9778764b276324fc6b1b9 /include/uapi
parentd6560052c2f73db59834e9a3c0aba20579aa7059 (diff)
parenteec262d179ff60e8d12298ab2f118661040e0bf5 (diff)
downloadlinux-a2590d69893f232cbb79d149dbbb456a1febca22.tar.gz
Merge tag 'spi-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
 "The main focus of this release from a framework point of view has been
  spi-mem where we've acquired support for a few new hardware features
  which enable better performance on suitable hardware.

  Otherwise mostly thanks to Arnd's cleanup efforts on old platforms
  we've removed several obsolete drivers which just about balance out
  the newer drivers we've added this cycle.

  Summary:

   - Allow drivers to flag if they are unidirectional.

   - Support for DTR mode and hardware acceleration of dummy cycles in
     spi-mem.

   - Support for Allwinder H616, Intel Lightning Mountain, nVidia Tegra
     QuadSPI, Realtek RTL838x and RTL839x.

   - Removal of obsolete EFM32, Txx9 and SIRF Prima and Atlas drivers"

* tag 'spi-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (76 commits)
  spi: Skip zero-length transfers in spi_transfer_one_message()
  spi: dw: Avoid stack content exposure
  spi: cadence-quadspi: Use spi_mem_dtr_supports_op()
  spi: spi-mem: add spi_mem_dtr_supports_op()
  spi: atmel-quadspi: Disable the QSPI IP at suspend()
  spi: pxa2xx: Add IDs for the controllers found on Intel Lynxpoint
  spi: pxa2xx: Fix the controller numbering for Wildcat Point
  spi: Change provied to provided in the file spi.h
  spi: mediatek: add set_cs_timing support
  spi: support CS timing for HW & SW mode
  spi: add power control when set_cs_timing
  spi: stm32: make spurious and overrun interrupts visible
  spi: stm32h7: replace private SPI_1HZ_NS with NSEC_PER_SEC
  spi: stm32: defer probe for reset
  spi: stm32: driver uses reset controller only at init
  spi: stm32h7: ensure message are smaller than max size
  spi: stm32: use bitfield macros
  spi: stm32: do not mandate cs_gpio
  spi: stm32: properly handle 0 byte transfer
  spi: clps711xx: remove redundant white-space
  ...
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/linux/spi/spi.h41
-rw-r--r--include/uapi/linux/spi/spidev.h30
2 files changed, 42 insertions, 29 deletions
diff --git a/include/uapi/linux/spi/spi.h b/include/uapi/linux/spi/spi.h
new file mode 100644
index 000000000000..236a85f08ded
--- /dev/null
+++ b/include/uapi/linux/spi/spi.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
+#ifndef _UAPI_SPI_H
+#define _UAPI_SPI_H
+
+#include <linux/const.h>
+
+#define	SPI_CPHA		_BITUL(0)	/* clock phase */
+#define	SPI_CPOL		_BITUL(1)	/* clock polarity */
+
+#define	SPI_MODE_0		(0|0)		/* (original MicroWire) */
+#define	SPI_MODE_1		(0|SPI_CPHA)
+#define	SPI_MODE_2		(SPI_CPOL|0)
+#define	SPI_MODE_3		(SPI_CPOL|SPI_CPHA)
+#define	SPI_MODE_X_MASK		(SPI_CPOL|SPI_CPHA)
+
+#define	SPI_CS_HIGH		_BITUL(2)	/* chipselect active high? */
+#define	SPI_LSB_FIRST		_BITUL(3)	/* per-word bits-on-wire */
+#define	SPI_3WIRE		_BITUL(4)	/* SI/SO signals shared */
+#define	SPI_LOOP		_BITUL(5)	/* loopback mode */
+#define	SPI_NO_CS		_BITUL(6)	/* 1 dev/bus, no chipselect */
+#define	SPI_READY		_BITUL(7)	/* slave pulls low to pause */
+#define	SPI_TX_DUAL		_BITUL(8)	/* transmit with 2 wires */
+#define	SPI_TX_QUAD		_BITUL(9)	/* transmit with 4 wires */
+#define	SPI_RX_DUAL		_BITUL(10)	/* receive with 2 wires */
+#define	SPI_RX_QUAD		_BITUL(11)	/* receive with 4 wires */
+#define	SPI_CS_WORD		_BITUL(12)	/* toggle cs after each word */
+#define	SPI_TX_OCTAL		_BITUL(13)	/* transmit with 8 wires */
+#define	SPI_RX_OCTAL		_BITUL(14)	/* receive with 8 wires */
+#define	SPI_3WIRE_HIZ		_BITUL(15)	/* high impedance turnaround */
+
+/*
+ * All the bits defined above should be covered by SPI_MODE_USER_MASK.
+ * The SPI_MODE_USER_MASK has the SPI_MODE_KERNEL_MASK counterpart in
+ * 'include/linux/spi/spi.h'. The bits defined here are from bit 0 upwards
+ * while in SPI_MODE_KERNEL_MASK they are from the other end downwards.
+ * These bits must not overlap. A static assert check should make sure of that.
+ * If adding extra bits, make sure to increase the bit index below as well.
+ */
+#define SPI_MODE_USER_MASK	(_BITUL(16) - 1)
+
+#endif /* _UAPI_SPI_H */
diff --git a/include/uapi/linux/spi/spidev.h b/include/uapi/linux/spi/spidev.h
index d56427c0b3e0..0c3da08f2aff 100644
--- a/include/uapi/linux/spi/spidev.h
+++ b/include/uapi/linux/spi/spidev.h
@@ -25,35 +25,7 @@
 
 #include <linux/types.h>
 #include <linux/ioctl.h>
-
-/* User space versions of kernel symbols for SPI clocking modes,
- * matching <linux/spi/spi.h>
- */
-
-#define SPI_CPHA		0x01
-#define SPI_CPOL		0x02
-
-#define SPI_MODE_0		(0|0)
-#define SPI_MODE_1		(0|SPI_CPHA)
-#define SPI_MODE_2		(SPI_CPOL|0)
-#define SPI_MODE_3		(SPI_CPOL|SPI_CPHA)
-
-#define SPI_CS_HIGH		0x04
-#define SPI_LSB_FIRST		0x08
-#define SPI_3WIRE		0x10
-#define SPI_LOOP		0x20
-#define SPI_NO_CS		0x40
-#define SPI_READY		0x80
-#define SPI_TX_DUAL		0x100
-#define SPI_TX_QUAD		0x200
-#define SPI_RX_DUAL		0x400
-#define SPI_RX_QUAD		0x800
-#define SPI_CS_WORD		0x1000
-#define SPI_TX_OCTAL		0x2000
-#define SPI_RX_OCTAL		0x4000
-#define SPI_3WIRE_HIZ		0x8000
-
-/*---------------------------------------------------------------------------*/
+#include <linux/spi/spi.h>
 
 /* IOCTL commands */