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| author | Arnd Bergmann <arnd@arndb.de> | 2022-05-09 23:10:47 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-05-09 23:10:48 +0200 |
| commit | 2b6866d70db1e2f19c7f8a4e90d9544957f734e6 (patch) | |
| tree | 7b84470a32bc06ace28810307b7300b079b5dc85 /include/dt-bindings | |
| parent | 1901300bf356a74437117464e19fc5f278f88d9a (diff) | |
| parent | 7a0c5cb67166ba546ec52e2dc2145b8f89caa9fc (diff) | |
| download | linux-2b6866d70db1e2f19c7f8a4e90d9544957f734e6.tar.gz | |
Merge tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.19: - A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power domains, and add HSIO and HDMI block control support. * tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: fix semicolon.cocci warnings soc: imx: add i.MX8MP HDMI blk-ctrl soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl soc: imx: add i.MX8MP HSIO blk-ctrl dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains dt-bindings: soc: Add i.MX8MP media block control DT bindings soc: imx: imx8m-blk-ctrl: set power device name soc: imx: gpcv2: add support for i.MX8MP power domains soc: imx: gpcv2: add PGC control register indirection Link: https://lore.kernel.org/r/20220508033843.2773685-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/power/imx8mp-power.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h index 9f90c40a2c6c..7789bcca3223 100644 --- a/include/dt-bindings/power/imx8mp-power.h +++ b/include/dt-bindings/power/imx8mp-power.h @@ -32,4 +32,22 @@ #define IMX8MP_HSIOBLK_PD_PCIE 3 #define IMX8MP_HSIOBLK_PD_PCIE_PHY 4 +#define IMX8MP_MEDIABLK_PD_MIPI_DSI_1 0 +#define IMX8MP_MEDIABLK_PD_MIPI_CSI2_1 1 +#define IMX8MP_MEDIABLK_PD_LCDIF_1 2 +#define IMX8MP_MEDIABLK_PD_ISI 3 +#define IMX8MP_MEDIABLK_PD_MIPI_CSI2_2 4 +#define IMX8MP_MEDIABLK_PD_LCDIF_2 5 +#define IMX8MP_MEDIABLK_PD_ISP 6 +#define IMX8MP_MEDIABLK_PD_DWE 7 +#define IMX8MP_MEDIABLK_PD_MIPI_DSI_2 8 + +#define IMX8MP_HDMIBLK_PD_IRQSTEER 0 +#define IMX8MP_HDMIBLK_PD_LCDIF 1 +#define IMX8MP_HDMIBLK_PD_PAI 2 +#define IMX8MP_HDMIBLK_PD_PVI 3 +#define IMX8MP_HDMIBLK_PD_TRNG 4 +#define IMX8MP_HDMIBLK_PD_HDMI_TX 5 +#define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY 6 + #endif |