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| author | Olof Johansson <olof@lixom.net> | 2020-09-26 10:01:51 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2020-09-26 10:01:52 -0700 |
| commit | dd59aed76d02aa5d511ef660598a6916a2ab1e3c (patch) | |
| tree | 6b412331f8a62d6c902b738de63501ee30dff8b0 /include/dt-bindings | |
| parent | 61d5d791cbf750f80eb3227d574c326b10e1755d (diff) | |
| parent | 639448912ba17a9af9e759efbab37d36c6e29dea (diff) | |
| download | linux-dd59aed76d02aa5d511ef660598a6916a2ab1e3c.tar.gz | |
Merge tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Changes for v5.10-rc1 This set of changes fixes some minor issues in existing device trees and adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled to allow them to be detected by software. It also adds support for the Tegra234 VDK board, which is a pre-silicon platform for the upcoming Orin SoC. * tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Initial Tegra234 VDK support arm64: tegra: Populate EEPROMs for Jetson Xavier NX arm64: tegra: Add label properties for EEPROMs arm64: tegra: Add DT binding for AHUB components arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano arm64: tegra: Properly size register regions for GPU on Tegra194 arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210 arm64: tegra: Describe display controller outputs for Tegra210 arm64: tegra: Disable SD card write-protection on Jetson Nano arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano arm64: tegra: Wire up pinctrl states for all DPAUX controllers arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier Link: https://lore.kernel.org/r/20200918150303.3938852-5-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/tegra234-clock.h | 14 | ||||
| -rw-r--r-- | include/dt-bindings/reset/tegra234-reset.h | 10 |
2 files changed, 24 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h new file mode 100644 index 000000000000..2c82072950ee --- /dev/null +++ b/include/dt-bindings/clock/tegra234-clock.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */ + +#ifndef DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H +#define DT_BINDINGS_CLOCK_TEGRA234_CLOCK_H + +/** @brief output of gate CLK_ENB_FUSE */ +#define TEGRA234_CLK_FUSE 40 +/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 */ +#define TEGRA234_CLK_SDMMC4 123 +/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */ +#define TEGRA234_CLK_UARTA 155 + +#endif diff --git a/include/dt-bindings/reset/tegra234-reset.h b/include/dt-bindings/reset/tegra234-reset.h new file mode 100644 index 000000000000..b3c63be06d2d --- /dev/null +++ b/include/dt-bindings/reset/tegra234-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. */ + +#ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H +#define DT_BINDINGS_RESET_TEGRA234_RESET_H + +#define TEGRA234_RESET_SDMMC4 85 +#define TEGRA234_RESET_UARTA 100 + +#endif |