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authorShaik Ameer Basha <shaik.ameer@samsung.com>2014-05-08 16:57:56 +0530
committerTomasz Figa <t.figa@samsung.com>2014-05-14 19:40:20 +0200
commitfaec151b5006f832c8cefc76d01893496445a7ec (patch)
tree2fd8c09370c7026d25523ff6e14b50c25582c227 /include/dt-bindings/clock/exynos5420.h
parent424b673a0557693fdc2ac6cff5289153d6fb8903 (diff)
downloadlinux-faec151b5006f832c8cefc76d01893496445a7ec.tar.gz
clk: samsung: exynos5420: update clocks for PERIC block
This patch includes,
    1] renaming of the HSI2C clocks
    2] renaming of spi clocks according to the datasheet
    3] fixes for child-parent relationships
    4] adding of more clocks related to PERIC block
    5] use GATE_IP_* offsets instead of GATE_BUS_*

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock/exynos5420.h')
-rw-r--r--include/dt-bindings/clock/exynos5420.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 2a28a86fc8e8..e688b64564b2 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -69,10 +69,10 @@
 #define CLK_I2C1		262
 #define CLK_I2C2		263
 #define CLK_I2C3		264
-#define CLK_I2C4		265
-#define CLK_I2C5		266
-#define CLK_I2C6		267
-#define CLK_I2C7		268
+#define CLK_USI0		265
+#define CLK_USI1		266
+#define CLK_USI2		267
+#define CLK_USI3		268
 #define CLK_I2C_HDMI		269
 #define CLK_TSADC		270
 #define CLK_SPI0		271
@@ -85,9 +85,9 @@
 #define CLK_PCM2		278
 #define CLK_PWM			279
 #define CLK_SPDIF		280
-#define CLK_I2C8		281
-#define CLK_I2C9		282
-#define CLK_I2C10		283
+#define CLK_USI4		281
+#define CLK_USI5		282
+#define CLK_USI6		283
 #define CLK_ACLK66_PSGEN	300
 #define CLK_CHIPID		301
 #define CLK_SYSREG		302