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author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2019-11-09 15:03:01 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2019-11-11 12:59:10 -0800 |
commit | c9d2203bcb813805cd74abe17e9a4c811fc0bf02 (patch) | |
tree | 9cc7819724695019b9f5d8c576d92c68ef5b62ad /drivers | |
parent | 21468199016f4e4983c7c22368d1cfba3914facb (diff) | |
download | linux-c9d2203bcb813805cd74abe17e9a4c811fc0bf02.tar.gz |
net: mscc: ocelot: don't hardcode the number of the CPU port
VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the queuing subsystem for terminating traffic locally). There are 2 issues with hardcoding the CPU port as #10: - It is not clear which snippets of the code are configuring something for one of the CPU ports, and which snippets are just doing something related to the number of physical ports. - Actually any physical port can act as a CPU port connected to an external CPU (in addition to the local CPU). This is called NPI mode (Node Processor Interface) and is the way that the 6-port VSC9959 (Felix) switch is integrated inside NXP LS1028A (the "local management CPU" functionality is not used there). This patch makes it clear that the ocelot_bridge_stp_state_set function operates on the CPU port (by making it an implicit member of the bridging domain), and at the same time adds logic for the NPI port (aka a physical port) to play the role of a CPU port (it shouldn't be part of bridge_fwd_mask, as it's not explicitly enslaved to a bridge). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ethernet/mscc/ocelot.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index bba6d60dc5a8..3e7a2796c37d 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -1383,7 +1383,7 @@ static void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, * a source for the other ports. */ for (p = 0; p < ocelot->num_phys_ports; p++) { - if (ocelot->bridge_fwd_mask & BIT(p)) { + if (p == ocelot->cpu || (ocelot->bridge_fwd_mask & BIT(p))) { unsigned long mask = ocelot->bridge_fwd_mask & ~BIT(p); for (i = 0; i < ocelot->num_phys_ports; i++) { @@ -1398,15 +1398,18 @@ static void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, } } - ocelot_write_rix(ocelot, - BIT(ocelot->num_phys_ports) | mask, + /* Avoid the NPI port from looping back to itself */ + if (p != ocelot->cpu) + mask |= BIT(ocelot->cpu); + + ocelot_write_rix(ocelot, mask, ANA_PGID_PGID, PGID_SRC + p); } else { /* Only the CPU port, this is compatible with link * aggregation. */ ocelot_write_rix(ocelot, - BIT(ocelot->num_phys_ports), + BIT(ocelot->cpu), ANA_PGID_PGID, PGID_SRC + p); } } |