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| author | Sudeep Holla <sudeep.holla@arm.com> | 2019-07-08 09:41:08 +0100 |
|---|---|---|
| committer | Sudeep Holla <sudeep.holla@arm.com> | 2019-08-12 12:23:02 +0100 |
| commit | c8ae9c2da1cc5d18b6d51d10160508a3dc3436bf (patch) | |
| tree | 7989bce13cd03daf76cf99ea5bc5ccf8a0d66e3d /drivers/reset/Makefile | |
| parent | 95a15d80aa0de938299acfcbc6aa6f2b16f5d7e5 (diff) | |
| download | linux-c8ae9c2da1cc5d18b6d51d10160508a3dc3436bf.tar.gz | |
reset: Add support for resets provided by SCMI
On some ARM based systems, a separate Cortex-M based System Control Processor(SCP) provides the overall power, clock, reset and system control. System Control and Management Interface(SCMI) Message Protocol is defined for the communication between the Application Cores(AP) and the SCP. Adds support for the resets provided using SCMI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different ARM SCMI device operations provided by the ARM SCMI framework. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'drivers/reset/Makefile')
| -rw-r--r-- | drivers/reset/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 61456b8f659c..cf60ce526064 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o +obj-$(CONFIG_RESET_SCMI) += reset-scmi.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o |