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author | Elaine Zhang <zhangqing@rock-chips.com> | 2018-06-15 10:16:50 +0800 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2018-07-06 19:17:57 +0200 |
commit | 956060a52795a060833e8de2d1bb89209e61bed2 (patch) | |
tree | 2cc5d99d9e264bad467efcc7f3458d9875b4743f /drivers/pinctrl/zte | |
parent | d409d59f021d4c8c97a2ee29d1cae74773fb36bd (diff) | |
download | linux-956060a52795a060833e8de2d1bb89209e61bed2.tar.gz |
clk: rockchip: add support for half divider
The new Rockchip socs have optional half divider: The formula is shown as: freq_out = 2*freq_in / (2*div + 3) Is this the same for all of new SoCs. So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \ DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV" to hook that special divider clock-type into our clock-tree. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/pinctrl/zte')
0 files changed, 0 insertions, 0 deletions