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| author | David Woodhouse <David.Woodhouse@intel.com> | 2009-05-10 17:16:06 +0100 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-05-10 19:49:52 +0100 |
| commit | 4c25a2c1b90bf785fc2e2f0f0c74a80b3e070d39 (patch) | |
| tree | 2784fbbf4d6782db300b92870d2bf6111ef26627 /drivers/pci/dmar.c | |
| parent | fa3b6dcd5298db2e7b63c17795c9e5570d3df8d9 (diff) | |
| download | linux-4c25a2c1b90bf785fc2e2f0f0c74a80b3e070d39.tar.gz | |
intel-iommu: Clean up handling of "caching mode" vs. context flushing.
It really doesn't make a lot of sense to have some of the logic to handle caching vs. non-caching mode duplicated in qi_flush_context() and __iommu_flush_context(), while the return value indicates whether the caller should take other action which depends on the same thing. Especially since qi_flush_context() thought it was returning something entirely different anyway. This patch makes qi_flush_context() and __iommu_flush_context() both return void, removes the 'non_present_entry_flush' argument and makes the only call site which _set_ that argument to 1 do the right thing. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/dmar.c')
| -rw-r--r-- | drivers/pci/dmar.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c index d3d86b749eee..10a071ba3232 100644 --- a/drivers/pci/dmar.c +++ b/drivers/pci/dmar.c @@ -723,23 +723,16 @@ void qi_global_iec(struct intel_iommu *iommu) qi_submit_sync(&desc, iommu); } -int qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid, u8 fm, - u64 type, int non_present_entry_flush) +void qi_flush_context(struct intel_iommu *iommu, u16 did, u16 sid, u8 fm, + u64 type) { struct qi_desc desc; - if (non_present_entry_flush) { - if (!cap_caching_mode(iommu->cap)) - return 1; - else - did = 0; - } - desc.low = QI_CC_FM(fm) | QI_CC_SID(sid) | QI_CC_DID(did) | QI_CC_GRAN(type) | QI_CC_TYPE; desc.high = 0; - return qi_submit_sync(&desc, iommu); + qi_submit_sync(&desc, iommu); } int qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr, |