diff options
| author | Anton Blanchard <anton@samba.org> | 2011-10-14 05:31:04 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-10-17 19:00:54 -0400 |
| commit | 945db2d4f4f6caf75b988f78e40aa75145ee46a4 (patch) | |
| tree | 9b520e3940e031def6d7e43f257051164e452530 /drivers/net/ethernet/ibm | |
| parent | 076f203258c5b8f07226ba41c4643d958785bb07 (diff) | |
| download | linux-945db2d4f4f6caf75b988f78e40aa75145ee46a4.tar.gz | |
ehea: Allocate large enough skbs to avoid partial cacheline DMA writes
The ehea adapter has a mode where it will avoid partial cacheline DMA writes on receive by always padding packets to fall on a cacheline boundary. Unfortunately we currently aren't allocating enough space for a full ethernet MTU packet to be rounded up, so this optimisation doesn't hit. It's unfortunate that the next largest packet size exposed by the hypervisor interface is 2kB, meaning our skb allocation comes out of a 4kB SLAB. However the performance increase due to this optimisation is quite large and my TCP stream numbers increase from 900MB to 1000MB/sec. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/ibm')
| -rw-r--r-- | drivers/net/ethernet/ibm/ehea/ehea.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/ibm/ehea/ehea.h b/drivers/net/ethernet/ibm/ehea/ehea.h index 8e7c5941a148..7aa47d86d9d7 100644 --- a/drivers/net/ethernet/ibm/ehea/ehea.h +++ b/drivers/net/ethernet/ibm/ehea/ehea.h @@ -82,7 +82,7 @@ #define EHEA_SG_RQ3 0 #define EHEA_MAX_PACKET_SIZE 9022 /* for jumbo frames */ -#define EHEA_RQ2_PKT_SIZE 1522 +#define EHEA_RQ2_PKT_SIZE 2048 #define EHEA_L_PKT_SIZE 256 /* low latency */ #define MAX_LRO_DESCRIPTORS 8 @@ -93,7 +93,7 @@ #define EHEA_PD_ID 0xaabcdeff #define EHEA_RQ2_THRESHOLD 1 -#define EHEA_RQ3_THRESHOLD 9 /* use RQ3 threshold of 1522 bytes */ +#define EHEA_RQ3_THRESHOLD 4 /* use RQ3 threshold of 2048 bytes */ #define EHEA_SPEED_10G 10000 #define EHEA_SPEED_1G 1000 |