summary refs log tree commit diff
path: root/drivers/mtd
diff options
context:
space:
mode:
authorDavid Clear <dac2@pensando.io>2020-07-20 09:36:55 -0700
committerTudor Ambarus <tudor.ambarus@microchip.com>2020-07-27 08:36:37 +0300
commit48029e620decc185c88041e12156e4f5d871b28a (patch)
tree330dad36dec57a57dec71cac0e03414f509c92e1 /drivers/mtd
parent44a80df4bfce02f5d51fe5040bdbdf10d0d78f4e (diff)
downloadlinux-48029e620decc185c88041e12156e4f5d871b28a.tar.gz
mtd: spi-nor: macronix: Add support for mx66u2g45g
The Macronix mx66u2g45g is a 1.8V, 2Gbit (256MB) device that
supports x1, x2, or x4 operation.

Tested on Pensando SoC hardware with a cadence quadspi controller
via drivers/spi/spi-cadence-quadspi.c, in x2 mode at 50MHz.
  - random data write, erase, read   - verified erase operations
  - random data write, read/compare  - verified write/read operations

Signed-off-by: David Clear <dac2@pensando.io>
Acked-by: Shannon Nelson <snelson@pensando.io>
Link: https://lore.kernel.org/r/20200720163656.38006-2-dac2@pensando.io
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/spi-nor/macronix.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 0ae0815a3633..f97f3d127575 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -87,6 +87,9 @@ static const struct flash_info macronix_parts[] = {
 			      SPI_NOR_QUAD_READ) },
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048,
 			      SPI_NOR_QUAD_READ) },
+	{ "mx66u2g45g",	 INFO(0xc2253c, 0, 64 * 1024, 4096,
+			      SECT_4K | SPI_NOR_DUAL_READ |
+			      SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 };
 
 static void macronix_default_init(struct spi_nor *nor)