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| author | Dave Gerlach <d-gerlach@ti.com> | 2019-04-02 11:57:42 -0500 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2019-04-09 08:31:51 -0700 |
| commit | 6c110561eb2d4d1496961c13a92f96f29eea7c72 (patch) | |
| tree | 8c1237a3dbc0f2bafb8df589b2f9c1dbf8c04a69 /drivers/memory/emif.h | |
| parent | 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff) | |
| download | linux-6c110561eb2d4d1496961c13a92f96f29eea7c72.tar.gz | |
memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling
In certain situations, such as when returning from low power modes, the EMIF must re-run hardware leveling to properly restore DDR3 access. This is accomplished by introducing a new ti-emif-sram-pm call, ti_emif_run_hw_leveling, to check if DDR3 is in use and if so, trigger the full write and read leveling processes. Suggested-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/memory/emif.h')
| -rw-r--r-- | drivers/memory/emif.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/memory/emif.h b/drivers/memory/emif.h index 9e9f8037955d..6b71fadb3cfa 100644 --- a/drivers/memory/emif.h +++ b/drivers/memory/emif.h @@ -537,6 +537,9 @@ #define MCONNID_SHIFT 0 #define MCONNID_MASK (0xff << 0) +/* READ_WRITE_LEVELING_CONTROL */ +#define RDWRLVLFULL_START 0x80000000 + /* DDR_PHY_CTRL_1 - EMIF4D */ #define DLL_SLAVE_DLY_CTRL_SHIFT_4D 4 #define DLL_SLAVE_DLY_CTRL_MASK_4D (0xFF << 4) @@ -598,6 +601,7 @@ extern struct emif_regs_amx3 ti_emif_regs_amx3; void ti_emif_save_context(void); void ti_emif_restore_context(void); +void ti_emif_run_hw_leveling(void); void ti_emif_enter_sr(void); void ti_emif_exit_sr(void); void ti_emif_abort_sr(void); |