diff options
| author | Marc Zyngier <maz@kernel.org> | 2022-02-24 10:12:26 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-03-01 10:06:25 +0000 |
| commit | d2febf6bbec5466824432e3d8850fc49e4343572 (patch) | |
| tree | d87a42425592517144577b38a28292721d64f1e1 /drivers/irqchip | |
| parent | a6aca2f460e203781dc41391913cc5b54f4bc0ce (diff) | |
| download | linux-d2febf6bbec5466824432e3d8850fc49e4343572.tar.gz | |
irqchip/qcom-pdc: Drop open coded version of __assign_bit()
The driver uses what looks like an open-coded version of __assign_bit(). Replace it with the real thing. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Maulik Shah <quic_mkshah@quicinc.com> Link: https://lore.kernel.org/r/20220224101226.88373-6-maz@kernel.org
Diffstat (limited to 'drivers/irqchip')
| -rw-r--r-- | drivers/irqchip/qcom-pdc.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 0cd20ddfae2a..d96916cf6a41 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -23,9 +23,6 @@ #define PDC_MAX_GPIO_IRQS 256 -#define CLEAR_INTR(reg, intr) (reg & ~(1 << intr)) -#define ENABLE_INTR(reg, intr) (reg | (1 << intr)) - #define IRQ_ENABLE_BANK 0x10 #define IRQ_i_CFG 0x110 @@ -55,16 +52,16 @@ static u32 pdc_reg_read(int reg, u32 i) static void pdc_enable_intr(struct irq_data *d, bool on) { int pin_out = d->hwirq; + unsigned long enable; unsigned long flags; u32 index, mask; - u32 enable; index = pin_out / 32; mask = pin_out % 32; raw_spin_lock_irqsave(&pdc_lock, flags); enable = pdc_reg_read(IRQ_ENABLE_BANK, index); - enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask); + __assign_bit(mask, &enable, on); pdc_reg_write(IRQ_ENABLE_BANK, index, enable); raw_spin_unlock_irqrestore(&pdc_lock, flags); } |