Merge tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next

Suzuki writes:
  "coresight: Changes for v6.1

   Coresight trace subsystem updates for v6.1 includes:
     - Support for HiSilicon PTT trace
     - Coresight cleanup of sysfs accessor functions, reduced
       code size.
     - Expose coresight timestamp source for ETMv4+
     - DT binding updates to include missing properties
     - Minor documentation, Kconfig text fixes.

   Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>"

* tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux:
  hwtracing: hisi_ptt: Fix up for "iommu/dma: Make header private"
  MAINTAINERS: Add maintainer for HiSilicon PTT driver
  docs: trace: Add HiSilicon PTT device driver documentation
  hwtracing: hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace device
  hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device
  iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity
  coresight: cti-sysfs: Mark coresight_cti_reg_store() as __maybe_unused
  coresight: Make new csdev_access offsets unsigned
  coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors
  coresight: Re-use same function for similar sysfs register accessors
  coresight: Simplify sysfs accessors by using csdev_access abstraction
  coresight: Remove unused function parameter
  coresight: etm4x: docs: Add documentation for 'ts_source' sysfs interface
  coresight: etm4x: Expose default timestamp source in sysfs
  dt-bindings: arm: coresight-tmc: Add 'iommu' property
  dt-bindings: arm: coresight: Add 'power-domains' property
  coresight: docs: Fix a broken reference
  coresight: trbe: fix Kconfig "its" grammar

1 files changed, 21 insertions, 0 deletions

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index d32b02336411..71f7edded9cf 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -2817,6 +2817,26 @@ static int arm_smmu_dev_disable_feature(struct device *dev,
 	}
 }
 
+/*
+ * HiSilicon PCIe tune and trace device can be used to trace TLP headers on the
+ * PCIe link and save the data to memory by DMA. The hardware is restricted to
+ * use identity mapping only.
+ */
+#define IS_HISI_PTT_DEVICE(pdev)	((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \
+					 (pdev)->device == 0xa12e)
+
+static int arm_smmu_def_domain_type(struct device *dev)
+{
+	if (dev_is_pci(dev)) {
+		struct pci_dev *pdev = to_pci_dev(dev);
+
+		if (IS_HISI_PTT_DEVICE(pdev))
+			return IOMMU_DOMAIN_IDENTITY;
+	}
+
+	return 0;
+}
+
 static struct iommu_ops arm_smmu_ops = {
 	.capable		= arm_smmu_capable,
 	.domain_alloc		= arm_smmu_domain_alloc,
@@ -2831,6 +2851,7 @@ static struct iommu_ops arm_smmu_ops = {
 	.sva_unbind		= arm_smmu_sva_unbind,
 	.sva_get_pasid		= arm_smmu_sva_get_pasid,
 	.page_response		= arm_smmu_page_response,
+	.def_domain_type	= arm_smmu_def_domain_type,
 	.pgsize_bitmap		= -1UL, /* Restricted during device attach */
 	.owner			= THIS_MODULE,
 	.default_domain_ops = &(const struct iommu_domain_ops) {