diff options
| author | Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> | 2020-02-19 15:39:50 +0100 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2020-03-08 17:28:37 +0000 |
| commit | 5621a63a017f665225b14ecd728c36e63ada710b (patch) | |
| tree | 6ce3f6d7cd23c2fb1ce5ef1420fb78138b2fc892 /drivers/iio | |
| parent | 3c1024aa99c3210ddddf5f2fefd99dddfc5c887c (diff) | |
| download | linux-5621a63a017f665225b14ecd728c36e63ada710b.tar.gz | |
iio: imu: inv_mpu6050: early init of chip_config for use at setup
Init chip_config early and use its values for initial setup. More coherent, prevent possible mistakes. Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio')
| -rw-r--r-- | drivers/iio/imu/inv_mpu6050/inv_mpu_core.c | 15 | ||||
| -rw-r--r-- | drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h | 1 |
2 files changed, 7 insertions, 9 deletions
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c index 0b06d6aa6469..85872e55154f 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c @@ -101,7 +101,7 @@ static const struct inv_mpu6050_reg_map reg_set_6050 = { static const struct inv_mpu6050_chip_config chip_config_6050 = { .fsr = INV_MPU6050_FSR_2000DPS, .lpf = INV_MPU6050_FILTER_20HZ, - .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE), + .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), .gyro_fifo_enable = false, .accl_fifo_enable = false, .temp_fifo_enable = false, @@ -370,20 +370,20 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev) u8 d; struct inv_mpu6050_state *st = iio_priv(indio_dev); - result = inv_mpu6050_set_gyro_fsr(st, INV_MPU6050_FSR_2000DPS); + result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); if (result) return result; - result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ); + result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); if (result) return result; - d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE); + d = st->chip_config.divider; result = regmap_write(st->map, st->reg->sample_rate_div, d); if (result) return result; - d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); + d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); result = regmap_write(st->map, st->reg->accl_config, d); if (result) return result; @@ -392,9 +392,6 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev) if (result) return result; - memcpy(&st->chip_config, hw_info[st->chip_type].config, - sizeof(struct inv_mpu6050_chip_config)); - /* * Internal chip period is 1ms (1kHz). * Let's use at the beginning the theorical value before measuring @@ -1116,6 +1113,8 @@ static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) st->hw = &hw_info[st->chip_type]; st->reg = hw_info[st->chip_type].reg; + memcpy(&st->chip_config, hw_info[st->chip_type].config, + sizeof(st->chip_config)); /* check chip self-identification */ result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index 9a81098a8b4d..d5edf903c076 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -321,7 +321,6 @@ struct inv_mpu6050_state { #define INV_MPU6050_TS_PERIOD_JITTER 4 /* init parameters */ -#define INV_MPU6050_INIT_FIFO_RATE 50 #define INV_MPU6050_MAX_FIFO_RATE 1000 #define INV_MPU6050_MIN_FIFO_RATE 4 |