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| author | Alex Deucher <alexander.deucher@amd.com> | 2016-03-31 16:41:32 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-04-01 10:08:36 -0400 |
| commit | b634de4f446c062a0c95ec4d150b4cf7c85e3526 (patch) | |
| tree | fd2678620e251499e85e4738aa04b4cba249d6c0 /drivers/gpu | |
| parent | d1518a1db31a25682ea09c4b135fa72d9883be42 (diff) | |
| download | linux-b634de4f446c062a0c95ec4d150b4cf7c85e3526.tar.gz | |
drm/amdgpu/gmc: use proper register for vram type on Fiji
The offset changed on Fiji. Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index 2611e8533be1..02deb3229405 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c @@ -873,6 +873,8 @@ static int gmc_v8_0_late_init(void *handle) return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0); } +#define mmMC_SEQ_MISC0_FIJI 0xA71 + static int gmc_v8_0_sw_init(void *handle) { int r; @@ -882,7 +884,12 @@ static int gmc_v8_0_sw_init(void *handle) if (adev->flags & AMD_IS_APU) { adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; } else { - u32 tmp = RREG32(mmMC_SEQ_MISC0); + u32 tmp; + + if (adev->asic_type == CHIP_FIJI) + tmp = RREG32(mmMC_SEQ_MISC0_FIJI); + else + tmp = RREG32(mmMC_SEQ_MISC0); tmp &= MC_SEQ_MISC0__MT__MASK; adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp); } |