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| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-04-10 11:15:10 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-14 19:15:23 +0200 |
| commit | c7240c3bc5d6610b42dbb10fda71bbbf1dad5515 (patch) | |
| tree | 7d711d513eeb51d484baaeb2fab266f36a0fe507 /drivers/gpu/drm/i915/intel_frontbuffer.c | |
| parent | 89251b177b588adf5e62df42d51017d24047f44b (diff) | |
| download | linux-c7240c3bc5d6610b42dbb10fda71bbbf1dad5515.tar.gz | |
drm/i915: PSR VLV: Add single frame update.
According to spec: "In PSR HW or SW mode, SW set this bit before writing registers for a flip. It will be self-clear when it gets to the PSR active state." Some versions of spec mention that this is needed when in "Persistent mode" but define it as same as "SW mode". Since this fix the page flip case let's assume this is exactly what we need. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_frontbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_frontbuffer.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_frontbuffer.c b/drivers/gpu/drm/i915/intel_frontbuffer.c index a20cffb78c0f..57095f54c1f2 100644 --- a/drivers/gpu/drm/i915/intel_frontbuffer.c +++ b/drivers/gpu/drm/i915/intel_frontbuffer.c @@ -243,6 +243,8 @@ void intel_frontbuffer_flip_prepare(struct drm_device *dev, /* Remove stale busy bits due to the old buffer. */ dev_priv->fb_tracking.busy_bits &= ~frontbuffer_bits; mutex_unlock(&dev_priv->fb_tracking.lock); + + intel_psr_single_frame_update(dev); } /** |