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| author | Tom Lendacky <thomas.lendacky@amd.com> | 2014-07-10 10:58:35 -0500 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2014-07-23 21:28:38 +0800 |
| commit | 126ae9adc1ec8d9006542f1a5e474b0183845e21 (patch) | |
| tree | f3ee814b261aa440feae1b5785f797aaa16cced7 /drivers/crypto/ccp/ccp-dev.c | |
| parent | 96956aef2ff5521af44d6cb896c967d025360ead (diff) | |
| download | linux-126ae9adc1ec8d9006542f1a5e474b0183845e21.tar.gz | |
crypto: ccp - Base AXI DMA cache settings on device tree
The default cache operations for ARM64 were changed during 3.15. To use coherent operations a "dma-coherent" device tree property is required. If that property is not present in the device tree node then the non-coherent operations are assigned for the device. Add support to the ccp driver to assign the AXI DMA cache settings based on whether the "dma-coherent" property is present in the device node. If present, use settings that work with the caches. If not present, use settings that do not look at the caches. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/ccp/ccp-dev.c')
| -rw-r--r-- | drivers/crypto/ccp/ccp-dev.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/ccp/ccp-dev.c b/drivers/crypto/ccp/ccp-dev.c index fa1ab10f960f..a7d110652a74 100644 --- a/drivers/crypto/ccp/ccp-dev.c +++ b/drivers/crypto/ccp/ccp-dev.c @@ -364,7 +364,7 @@ int ccp_init(struct ccp_device *ccp) #ifdef CONFIG_ARM64 /* For arm64 set the recommended queue cache settings */ - iowrite32(CACHE_WB_NO_ALLOC, ccp->io_regs + CMD_Q_CACHE_BASE + + iowrite32(ccp->axcache, ccp->io_regs + CMD_Q_CACHE_BASE + (CMD_Q_CACHE_INC * i)); #endif |