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author | Boris BREZILLON <b.brezillon@overkiz.com> | 2013-10-11 10:51:23 +0200 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-12-02 15:31:23 +0100 |
commit | e442d234405ad75e2d3d2baf15b364ee2c3573c9 (patch) | |
tree | 3aa5e2666bf5fccf0e4c61cf50030c839d7ef1b7 /drivers/clk/at91/Makefile | |
parent | 1a748d2bc5061b72588013a720645661345c0e65 (diff) | |
download | linux-e442d234405ad75e2d3d2baf15b364ee2c3573c9.tar.gz |
clk: at91: add PMC master clock
This patch adds new at91 master clock implementation using common clk framework. The master clock layout describe the MCKR register layout. There are 2 master clock layouts: - at91rm9200 - at91sam9x5 Master clocks are given characteristics: - min/max clock output rate These characteristics are checked during rate change to avoid over/underclocking. These characteristics are described in atmel's SoC datasheet in "Electrical Characteristics" paragraph. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'drivers/clk/at91/Makefile')
-rw-r--r-- | drivers/clk/at91/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 902bbf1fe584..e28fb2bbb198 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -3,4 +3,4 @@ # obj-y += pmc.o -obj-y += clk-main.o clk-pll.o clk-plldiv.o +obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o |