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| author | Olof Johansson <olof@lixom.net> | 2019-11-11 13:09:34 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-11-11 13:09:36 -0800 |
| commit | 13c1eff1755bdea7fede4b238aadc0228e410dfe (patch) | |
| tree | 3b1043cc6dedfc5461a0930372c6525841fe2360 /drivers/bus | |
| parent | 01d1a860a59b743426845e99c22a21aad35819d2 (diff) | |
| parent | f361c863b3bfa602da37d7a94d90a5dfee0d08fe (diff) | |
| download | linux-13c1eff1755bdea7fede4b238aadc0228e410dfe.tar.gz | |
Merge tag 'hisi-drivers-for-5.5' of git://github.com/hisilicon/linux-hisi into arm/drivers
ARM64: hisi: SoC driver updates for 5.5
- check the LOGIC_PIO_INDIRECT region ops at registration instead of
in the IO port accessors to optimise the lib/ligic_pio.c
- add the hisi LPC driver to the build test for the other architectures
except ALPHA, C6X, HEXAGON and PARISC as they do not define {read,write}sb
by updating the hisi LPC Kconfig and adding a dummy PIO_INDIRECT_SIZE
- clean the sparse complains of the hisi LPC driver
- build logic_pio into a lib to avoid including in the vmlinux when not
referenced
* tag 'hisi-drivers-for-5.5' of git://github.com/hisilicon/linux-hisi:
logic_pio: Build into a library
bus: hisi_lpc: Expand build test coverage
bus: hisi_lpc: Clean some types
logic_pio: Define PIO_INDIRECT_SIZE for !CONFIG_INDIRECT_PIO
lib: logic_pio: Enforce LOGIC_PIO_INDIRECT region ops are set at registration
Link: https://lore.kernel.org/r/5DC959B9.80301@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/bus')
| -rw-r--r-- | drivers/bus/Kconfig | 5 | ||||
| -rw-r--r-- | drivers/bus/hisi_lpc.c | 9 |
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 6b331061d34b..70886abe008e 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -41,8 +41,9 @@ config MOXTET config HISILICON_LPC bool "Support for ISA I/O space on HiSilicon Hip06/7" - depends on ARM64 && (ARCH_HISI || COMPILE_TEST) - select INDIRECT_PIO + depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X) + depends on HAS_IOMEM + select INDIRECT_PIO if ARM64 help Driver to enable I/O access to devices attached to the Low Pin Count bus on the HiSilicon Hip06/7 SoC. diff --git a/drivers/bus/hisi_lpc.c b/drivers/bus/hisi_lpc.c index 20c957185af2..8101df901830 100644 --- a/drivers/bus/hisi_lpc.c +++ b/drivers/bus/hisi_lpc.c @@ -74,7 +74,7 @@ struct hisi_lpc_dev { /* About 10us. This is specific for single IO operations, such as inb */ #define LPC_PEROP_WAITCNT 100 -static int wait_lpc_idle(unsigned char *mbase, unsigned int waitcnt) +static int wait_lpc_idle(void __iomem *mbase, unsigned int waitcnt) { u32 status; @@ -209,7 +209,7 @@ static u32 hisi_lpc_comm_in(void *hostdata, unsigned long pio, size_t dwidth) struct hisi_lpc_dev *lpcdev = hostdata; struct lpc_cycle_para iopara; unsigned long addr; - u32 rd_data = 0; + __le32 rd_data = 0; int ret; if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH) @@ -244,13 +244,12 @@ static void hisi_lpc_comm_out(void *hostdata, unsigned long pio, struct lpc_cycle_para iopara; const unsigned char *buf; unsigned long addr; + __le32 _val = cpu_to_le32(val); if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH) return; - val = cpu_to_le32(val); - - buf = (const unsigned char *)&val; + buf = (const unsigned char *)&_val; addr = hisi_lpc_pio_to_addr(lpcdev, pio); iopara.opflags = FG_INCRADDR_LPC; |