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author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-12-21 13:17:36 -0800 |
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committer | Mark Brown <broonie@kernel.org> | 2021-01-06 13:09:32 +0000 |
commit | 6a8a8b51703c69fa2d6adbbcbf731ce9b991c696 (patch) | |
tree | fd74cf139e5246317b9776bd658448116f92bfa0 /block/blk-cgroup-rwstat.h | |
parent | 98621ed011c57ba6e52e01a5982b221c9943b6d9 (diff) | |
download | linux-6a8a8b51703c69fa2d6adbbcbf731ce9b991c696.tar.gz |
spi: tegra210-quad: Add support for hardware dummy cycles transfer
Tegra Quad SPI controller hardware supports sending dummy bytes based on programmed dummy clock cycles after the actual transfer bytes. This patch adds this support of hardware dummy bytes transfer and skips transfer of dummy bytes from the software. For dummy cycles more than Tegra Quad SPI hardware maximum dummy cycles limit, driver transfers dummy bytes from the software. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-7-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'block/blk-cgroup-rwstat.h')
0 files changed, 0 insertions, 0 deletions