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| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2023-01-18 13:49:51 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-03-10 09:32:43 +0100 |
| commit | 76e64c9a0a8220957b81a741de0a1c85e0e85494 (patch) | |
| tree | 0b683c275d349896a9411f105c17c7c990ea4c2b /arch | |
| parent | 722ea8e50de8a74f8e140572bea3734c5f993931 (diff) | |
| download | linux-76e64c9a0a8220957b81a741de0a1c85e0e85494.tar.gz | |
ARM: dts: stm32: Update part number NVMEM description on stm32mp131
[ Upstream commit 366384e495511bea8583e44173629a3012d62db0 ]
The STM32MP13x Device Part Number (also named RPN in reference manual)
only uses the first 12 bits in OTP4, all the other bit are reserved and
they can be different of zero; they must be masked in NVMEM result, so
the number of bits must be defined in the nvmem cell description.
Fixes: 1da8779c0029 ("ARM: dts: stm32: add STM32MP13 SoCs support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp131.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index dd35a607073d..723787f72cfd 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -405,6 +405,7 @@ part_number_otp: part_number_otp@4 { reg = <0x4 0x2>; + bits = <0 12>; }; ts_cal1: calib@5c { reg = <0x5c 0x2>; |