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| author | Olof Johansson <olof@lixom.net> | 2019-12-06 08:29:54 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-12-06 08:29:56 -0800 |
| commit | 30f55eae47e4ad1b64d692865e6a4277447a33df (patch) | |
| tree | 6313182cb4cc88bd993549dc084f65e4190044d1 /arch | |
| parent | 916a9140627898f1f3feb220b8e77001c0d876bf (diff) | |
| parent | be8af7a9e3cce3cc4b7abbc8211dd06f8e72b976 (diff) | |
| download | linux-30f55eae47e4ad1b64d692865e6a4277447a33df.tar.gz | |
Merge tag 'arm-soc/for-5.5/devicetree-part2' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains the second batch of changes for Broadcom ARM-based SoCs, please pull the following: - Nicolas declares a CMA area within the first 1GB of DRAM in order for it to be guaranteed to reside there, otherwise ARM64's memory initialization will pick up a CMA area within ZONE_DMA32 - Stefan adds the Device Tree node for the built-in Ethernet controller (GENET) on the Raspberry Pi 4 model B board * tag 'arm-soc/for-5.5/devicetree-part2' of https://github.com/Broadcom/stblinux: ARM: dts: bcm2711-rpi-4: Enable GENET support ARM: dts: bcm2711: force CMA into first GB of memory Link: https://lore.kernel.org/r/20191118182931.11884-1-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 17 | ||||
| -rw-r--r-- | arch/arm/boot/dts/bcm2711.dtsi | 46 |
2 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts index cccc1ccd19be..1b5a835f66bd 100644 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts @@ -19,6 +19,10 @@ reg = <0 0 0>; }; + aliases { + ethernet0 = &genet; + }; + leds { act { gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; @@ -97,6 +101,19 @@ status = "okay"; }; +&genet { + phy-handle = <&phy1>; + phy-mode = "rgmii-rxid"; + status = "okay"; +}; + +&genet_mdio { + phy1: ethernet-phy@1 { + /* No PHY interrupt */ + reg = <0x1>; + }; +}; + /* uart0 communicates with the BT module */ &uart0 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index ac83dac2e6ba..961bed832755 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -12,6 +12,26 @@ interrupt-parent = <&gicv2>; + reserved-memory { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + /* + * arm64 reserves the CMA by default somewhere in ZONE_DMA32, + * that's not good enough for the BCM2711 as some devices can + * only address the lower 1G of memory (ZONE_DMA). + */ + linux,cma { + compatible = "shared-dma-pool"; + size = <0x2000000>; /* 32MB */ + alloc-ranges = <0x0 0x00000000 0x40000000>; + reusable; + linux,cma-default; + }; + }; + + soc { /* * Defined ranges: @@ -305,6 +325,32 @@ cpu-release-addr = <0x0 0x000000f0>; }; }; + + scb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; + + genet: ethernet@7d580000 { + compatible = "brcm,bcm2711-genet-v5"; + reg = <0x0 0x7d580000 0x10000>; + #address-cells = <0x1>; + #size-cells = <0x1>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + genet_mdio: mdio@e14 { + compatible = "brcm,genet-mdio-v5"; + reg = <0xe14 0x8>; + reg-names = "mdio"; + #address-cells = <0x0>; + #size-cells = <0x1>; + }; + }; + }; }; &clk_osc { |