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| author | Max Filippov <jcmvbkbc@gmail.com> | 2019-08-12 15:01:30 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-08-12 15:05:48 -0700 |
| commit | cd8869f4cb257f22b89495ca40f5281e58ba359c (patch) | |
| tree | 3b5759dd18c3adf1974e5ee191ed42f75b283673 /arch | |
| parent | d45331b00ddb179e291766617259261c112db872 (diff) | |
| download | linux-cd8869f4cb257f22b89495ca40f5281e58ba359c.tar.gz | |
xtensa: add missing isync to the cpu_reset TLB code
ITLB entry modifications must be followed by the isync instruction before the new entries are possibly used. cpu_reset lacks one isync between ITLB way 6 initialization and jump to the identity mapping. Add missing isync to xtensa cpu_reset. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/xtensa/kernel/setup.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 5cb8a62e091c..7c3106093c75 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -511,6 +511,7 @@ void cpu_reset(void) "add %2, %2, %7\n\t" "addi %0, %0, -1\n\t" "bnez %0, 1b\n\t" + "isync\n\t" /* Jump to identity mapping */ "jx %3\n" "2:\n\t" |