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| author | John David Anglin <dave.anglin@bell.net> | 2020-10-02 19:55:04 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2020-10-15 08:10:38 +0200 |
| commit | 6caf55e570efe53f161bf9af64f22b310e86032e (patch) | |
| tree | 15305dbf83b2f3a7923a00aa5ab4657224ad15af /arch | |
| parent | f15309d7ad5d12603941ef213ead0e7ebe6e8943 (diff) | |
| download | linux-6caf55e570efe53f161bf9af64f22b310e86032e.tar.gz | |
parisc: Add alternative patching to synchronize_caches define
This change allows the sync barrier instruction to be patched to a nop. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/parisc/include/asm/barrier.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/parisc/include/asm/barrier.h b/arch/parisc/include/asm/barrier.h index 640d46edf32e..c705decf2bed 100644 --- a/arch/parisc/include/asm/barrier.h +++ b/arch/parisc/include/asm/barrier.h @@ -2,11 +2,15 @@ #ifndef __ASM_BARRIER_H #define __ASM_BARRIER_H +#include <asm/alternative.h> + #ifndef __ASSEMBLY__ /* The synchronize caches instruction executes as a nop on systems in which all memory references are performed in order. */ -#define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory") +#define synchronize_caches() asm volatile("sync" \ + ALTERNATIVE(ALT_COND_NO_SMP, INSN_NOP) \ + : : : "memory") #if defined(CONFIG_SMP) #define mb() do { synchronize_caches(); } while (0) |