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authorDavid S. Miller <davem@sunset.davemloft.net>2007-08-07 19:09:29 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-08-07 19:09:29 -0700
commit68c9f9fd336dc7e793cecad25f8ac40ccaa7a256 (patch)
treecfd17a23b483052027b38e8653bf61d6afb83701 /arch/sparc64
parent46bcea7751efc867ae4b073c99ad1d137a475bc0 (diff)
downloadlinux-68c9f9fd336dc7e793cecad25f8ac40ccaa7a256.tar.gz
[SPARC64]: Fix hard-coding of cpu type output in /proc/cpuinfo on sun4v.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/kernel/cpu.c48
1 files changed, 40 insertions, 8 deletions
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c
index 7eb81d3954d9..e4eff878123d 100644
--- a/arch/sparc64/kernel/cpu.c
+++ b/arch/sparc64/kernel/cpu.c
@@ -1,7 +1,7 @@
 /* cpu.c: Dinky routines to look for the kind of Sparc cpu
  *        we are on.
  *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net)
  */
 
 #include <linux/kernel.h>
@@ -13,6 +13,7 @@
 #include <asm/fpumacro.h>
 #include <asm/cpudata.h>
 #include <asm/spitfire.h>
+#include <asm/prom.h>
 
 DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
 
@@ -61,21 +62,52 @@ struct cpu_iu_info linux_sparc_chips[] = {
 
 #define NSPARCCHIPS  ARRAY_SIZE(linux_sparc_chips)
 
-char *sparc_cpu_type = "cpu-oops";
-char *sparc_fpu_type = "fpu-oops";
+char *sparc_cpu_type;
+char *sparc_fpu_type;
 
 unsigned int fsr_storage;
 
+static void __init sun4v_cpu_probe(void)
+{
+	struct device_node *dp;
+	const char *compat;
+	int len;
+
+	dp = of_find_node_by_name(NULL, "cpu");
+	if (!dp)
+		goto no_compat;
+
+	compat = of_get_property(dp, "compatible", &len);
+	if (!compat)
+		goto no_compat;
+
+	if (of_find_in_proplist(compat, "SUNW,UltraSPARC-T1", len)) {
+		sparc_cpu_type = "UltraSparc T1 (Niagara)";
+		sparc_fpu_type = "UltraSparc T1 integrated FPU";
+	} else if (of_find_in_proplist(compat, "SUNW,UltraSPARC-T2", len)) {
+		sparc_cpu_type = "UltraSparc T2 (Niagara2)";
+		sparc_fpu_type = "UltraSparc T2 integrated FPU";
+	} else
+		goto unknown;
+
+	return;
+
+no_compat:
+	compat = "no property";
+
+unknown:
+	printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", compat);
+	sparc_cpu_type = "Unknown SUN4V CPU";
+	sparc_fpu_type = "Unknown SUN4V FPU";
+}
+
 void __init cpu_probe(void)
 {
 	unsigned long ver, fpu_vers, manuf, impl, fprs;
 	int i;
 	
-	if (tlb_type == hypervisor) {
-		sparc_cpu_type = "UltraSparc T1 (Niagara)";
-		sparc_fpu_type = "UltraSparc T1 integrated FPU";
-		return;
-	}
+	if (tlb_type == hypervisor)
+		return sun4v_cpu_probe();
 
 	fprs = fprs_read();
 	fprs_write(FPRS_FEF);