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| author | Paul Walmsley <paul.walmsley@sifive.com> | 2019-07-25 13:41:31 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-07-31 12:26:10 -0700 |
| commit | 11ae2d892139a1086f257188d457ddcb71ab5257 (patch) | |
| tree | d5d1c92d51020a5cd2789cc05d34b5f25052cc55 /arch/riscv/boot | |
| parent | b399abe7c21e248dc6224cadc9a378a2beb10cfd (diff) | |
| download | linux-11ae2d892139a1086f257188d457ddcb71ab5257.tar.gz | |
riscv: dts: fu540-c000: drop "timebase-frequency"
On FU540-based systems, the "timebase-frequency" (RTCCLK) is sourced from an external crystal located on the PCB. Thus the timebase-frequency DT property should be defined by the board that uses the SoC, not the SoC itself. Drop the superfluous timebase-frequency property from the SoC DT data. (It's already present in the board DT data.) Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 9bf63f0ab253..42b5ec223100 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -21,7 +21,6 @@ cpus { #address-cells = <1>; #size-cells = <0>; - timebase-frequency = <1000000>; cpu0: cpu@0 { compatible = "sifive,e51", "sifive,rocket0", "riscv"; device_type = "cpu"; |