diff options
| author | David Gibson <david@gibson.dropbear.id.au> | 2005-09-06 14:59:47 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2005-09-06 16:57:46 +1000 |
| commit | 14b34661615ec036ab4c91637913706e4caccc93 (patch) | |
| tree | 98915b1889422383a85186d8455ecca69fa2327b /arch/ppc64/mm | |
| parent | 0fdf0b8634055b016f7b93cfcdea2eb9091f0271 (diff) | |
| download | linux-14b34661615ec036ab4c91637913706e4caccc93.tar.gz | |
[PATCH] Invert sense of SLB class bit
Currently, we set the class bit in kernel SLB entries, and clear it on user SLB entries. On POWER5, ERAT entries created in real mode have the class bit clear. So to avoid flushing kernel ERAT entries on each context switch, this patch inverts our usage of the class bit, setting it on user SLB entries and clearing it on kernel SLB entries. Booted on POWER5 and G5. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc64/mm')
| -rw-r--r-- | arch/ppc64/mm/hugetlbpage.c | 6 | ||||
| -rw-r--r-- | arch/ppc64/mm/slb.c | 4 |
2 files changed, 6 insertions, 4 deletions
diff --git a/arch/ppc64/mm/hugetlbpage.c b/arch/ppc64/mm/hugetlbpage.c index e7833c80eb68..338771ec70d7 100644 --- a/arch/ppc64/mm/hugetlbpage.c +++ b/arch/ppc64/mm/hugetlbpage.c @@ -144,7 +144,8 @@ static void flush_low_segments(void *parm) for (i = 0; i < NUM_LOW_AREAS; i++) { if (! (areas & (1U << i))) continue; - asm volatile("slbie %0" : : "r" (i << SID_SHIFT)); + asm volatile("slbie %0" + : : "r" ((i << SID_SHIFT) | SLBIE_C)); } asm volatile("isync" : : : "memory"); @@ -164,7 +165,8 @@ static void flush_high_segments(void *parm) continue; for (j = 0; j < (1UL << (HTLB_AREA_SHIFT-SID_SHIFT)); j++) asm volatile("slbie %0" - :: "r" ((i << HTLB_AREA_SHIFT) + (j << SID_SHIFT))); + :: "r" (((i << HTLB_AREA_SHIFT) + + (j << SID_SHIFT)) | SLBIE_C)); } asm volatile("isync" : : : "memory"); diff --git a/arch/ppc64/mm/slb.c b/arch/ppc64/mm/slb.c index 244150a0bc18..0473953f6a37 100644 --- a/arch/ppc64/mm/slb.c +++ b/arch/ppc64/mm/slb.c @@ -87,8 +87,8 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm) int i; asm volatile("isync" : : : "memory"); for (i = 0; i < offset; i++) { - esid_data = (unsigned long)get_paca()->slb_cache[i] - << SID_SHIFT; + esid_data = ((unsigned long)get_paca()->slb_cache[i] + << SID_SHIFT) | SLBIE_C; asm volatile("slbie %0" : : "r" (esid_data)); } asm volatile("isync" : : : "memory"); |