summary refs log tree commit diff
path: root/arch/openrisc
diff options
context:
space:
mode:
authorSebastian Macke <sebastian@macke.de>2014-07-20 15:13:30 +0000
committerStafford Horne <shorne@gmail.com>2017-02-25 04:14:34 +0900
commit79f8a4d022f2d11d4fc90f785f575ac331e2ef71 (patch)
tree86bd39927a9ec63eb69d0ab39c584dc8629f20f6 /arch/openrisc
parent89c94fdb9718d8ff3243faf8133a2176fd91f207 (diff)
downloadlinux-79f8a4d022f2d11d4fc90f785f575ac331e2ef71.tar.gz
openrisc: Fix the bitmask for the unit present register
The bits were swapped, as per spec and processor implementation the
power management present bit is 9 and PIC bit is 8. This patch brings
the definitions into spec.

Signed-off-by: Sebastian Macke <sebastian@macke.de>
[shorne@gmail.com: Added commit body]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc')
-rw-r--r--arch/openrisc/include/asm/spr_defs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/openrisc/include/asm/spr_defs.h b/arch/openrisc/include/asm/spr_defs.h
index 5dbc668865c4..367dac70326a 100644
--- a/arch/openrisc/include/asm/spr_defs.h
+++ b/arch/openrisc/include/asm/spr_defs.h
@@ -152,8 +152,8 @@
 #define SPR_UPR_MP	   0x00000020  /* MAC present */
 #define SPR_UPR_DUP	   0x00000040  /* Debug unit present */
 #define SPR_UPR_PCUP	   0x00000080  /* Performance counters unit present */
-#define SPR_UPR_PMP	   0x00000100  /* Power management present */
-#define SPR_UPR_PICP	   0x00000200  /* PIC present */
+#define SPR_UPR_PICP	   0x00000100  /* PIC present */
+#define SPR_UPR_PMP	   0x00000200  /* Power management present */
 #define SPR_UPR_TTP	   0x00000400  /* Tick timer present */
 #define SPR_UPR_RES	   0x00fe0000  /* Reserved */
 #define SPR_UPR_CUP	   0xff000000  /* Context units present */