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| author | Ralf Baechle <ralf@linux-mips.org> | 2008-04-05 15:13:23 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-04-07 22:31:04 +0100 |
| commit | 9c5a3d729cf430609d091ff610a7db363aafcd47 (patch) | |
| tree | 29f56334c48e2b9aeb80880813e045a7be6e4688 /arch/mips | |
| parent | 950b0d28378c4ee63a30dad732a8319c8a41c95d (diff) | |
| download | linux-9c5a3d729cf430609d091ff610a7db363aafcd47.tar.gz | |
[MIPS] Handle aliases in vmalloc correctly.
flush_cache_vmap / flush_cache_vunmap were calling flush_cache_all which - having been deprecated - turned into a nop ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 14 | ||||
| -rw-r--r-- | arch/mips/mm/c-tx39.c | 15 | ||||
| -rw-r--r-- | arch/mips/mm/cache.c | 3 |
3 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 6496925b5e29..77aefb4ebedd 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -361,6 +361,16 @@ static inline int has_valid_asid(const struct mm_struct *mm) #endif } +static void r4k__flush_cache_vmap(void) +{ + r4k_blast_dcache(); +} + +static void r4k__flush_cache_vunmap(void) +{ + r4k_blast_dcache(); +} + static inline void local_r4k_flush_cache_range(void * args) { struct vm_area_struct *vma = args; @@ -1281,6 +1291,10 @@ void __cpuinit r4k_cache_init(void) PAGE_SIZE - 1); else shm_align_mask = PAGE_SIZE-1; + + __flush_cache_vmap = r4k__flush_cache_vmap; + __flush_cache_vunmap = r4k__flush_cache_vunmap; + flush_cache_all = cache_noop; __flush_cache_all = r4k___flush_cache_all; flush_cache_mm = r4k_flush_cache_mm; diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c index b09d56981d53..a9f7f1f5e9b4 100644 --- a/arch/mips/mm/c-tx39.c +++ b/arch/mips/mm/c-tx39.c @@ -122,6 +122,16 @@ static inline void tx39_blast_icache(void) local_irq_restore(flags); } +static void tx39__flush_cache_vmap(void) +{ + tx39_blast_dcache(); +} + +static void tx39__flush_cache_vunmap(void) +{ + tx39_blast_dcache(); +} + static inline void tx39_flush_cache_all(void) { if (!cpu_has_dc_aliases) @@ -344,6 +354,8 @@ void __cpuinit tx39_cache_init(void) switch (current_cpu_type()) { case CPU_TX3912: /* TX39/H core (writethru direct-map cache) */ + __flush_cache_vmap = tx39__flush_cache_vmap; + __flush_cache_vunmap = tx39__flush_cache_vunmap; flush_cache_all = tx39h_flush_icache_all; __flush_cache_all = tx39h_flush_icache_all; flush_cache_mm = (void *) tx39h_flush_icache_all; @@ -369,6 +381,9 @@ void __cpuinit tx39_cache_init(void) write_c0_wired(0); /* set 8 on reset... */ /* board-dependent init code may set WBON */ + __flush_cache_vmap = tx39__flush_cache_vmap; + __flush_cache_vunmap = tx39__flush_cache_vunmap; + flush_cache_all = tx39_flush_cache_all; __flush_cache_all = tx39___flush_cache_all; flush_cache_mm = tx39_flush_cache_mm; diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 51ab1faa027d..f5903679ee6a 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -30,6 +30,9 @@ void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); void (*flush_icache_range)(unsigned long start, unsigned long end); +void (*__flush_cache_vmap)(void); +void (*__flush_cache_vunmap)(void); + /* MIPS specific cache operations */ void (*flush_cache_sigtramp)(unsigned long addr); void (*local_flush_data_cache_page)(void * addr); |