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| author | Yijing Wang <wangyijing@huawei.com> | 2014-09-23 11:02:42 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-10-01 12:21:23 -0600 |
| commit | 48c3c38f003c25d50a09d3da558667c5ecd530aa (patch) | |
| tree | aad2a4190c8622ab17b62384697cc6a356aab545 /arch/mips | |
| parent | 81052769e48609525c452d8f078a5786b673e178 (diff) | |
| download | linux-48c3c38f003c25d50a09d3da558667c5ecd530aa.tar.gz | |
PCI/MSI: Remove "pos" from the struct msi_desc msi_attrib
"msi_attrib.pos" is only used for MSI (not MSI-X), and we already cache the MSI capability offset in "dev->msi_cap". Remove "pos" from the struct msi_attrib and use "dev->msi_cap" directly. [bhelgaas: changelog, fix whitespace] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/pci/msi-octeon.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index ab0c5d14c6f7..63bbe07a1ccd 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c @@ -73,8 +73,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) * wants. Most devices only want 1, which will give * configured_private_bits and request_private_bits equal 0. */ - pci_read_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS, - &control); + pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); /* * If the number of private bits has been configured then use @@ -176,8 +175,7 @@ msi_irq_allocated: /* Update the number of IRQs the device has available to it */ control &= ~PCI_MSI_FLAGS_QSIZE; control |= request_private_bits << 4; - pci_write_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS, - control); + pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); irq_set_msi_desc(irq, desc); write_msi_msg(irq, &msg); |