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| author | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:25:55 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:25:55 +0100 |
| commit | 34f5c1c5787bd13a3fbfc284ff7f719846427b9d (patch) | |
| tree | 094b0b56de8af5bffbfb1752662745b34882b472 /arch/mips/sibyte/Platform | |
| parent | f6e1db1b87a9199275694d10713d4baa80030fc7 (diff) | |
| download | linux-34f5c1c5787bd13a3fbfc284ff7f719846427b9d.tar.gz | |
MIPS: Sibyte: Migrate to new platform makefile style.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte/Platform')
| -rw-r--r-- | arch/mips/sibyte/Platform | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/mips/sibyte/Platform b/arch/mips/sibyte/Platform new file mode 100644 index 000000000000..911dfe39c631 --- /dev/null +++ b/arch/mips/sibyte/Platform @@ -0,0 +1,43 @@ +# +# These are all rather similar so we consider them a single platform +# +platform-$(CONFIG_SIBYTE_BCM112X) += sibyte/ +platform-$(CONFIG_SIBYTE_SB1250) += sibyte/ +platform-$(CONFIG_SIBYTE_BCM1x55) += sibyte/ +platform-$(CONFIG_SIBYTE_BCM1x80) += sibyte/ + +# +# Sibyte SB1250 / BCM1480 family of SOCs +# +cflags-$(CONFIG_SIBYTE_BCM112X) += \ + -I$(srctree)/arch/mips/include/asm/mach-sibyte \ + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL + +platform-$(CONFIG_SIBYTE_SB1250) += sibyte/ +cflags-$(CONFIG_SIBYTE_SB1250) += \ + -I$(srctree)/arch/mips/include/asm/mach-sibyte \ + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL + +cflags-$(CONFIG_SIBYTE_BCM1x55) += \ + -I$(srctree)/arch/mips/include/asm/mach-sibyte \ + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL + +cflags-$(CONFIG_SIBYTE_BCM1x80) += \ + -I$(srctree)/arch/mips/include/asm/mach-sibyte \ + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL + +# +# Sibyte BCM91120x (Carmel) board +# Sibyte BCM91120C (CRhine) board +# Sibyte BCM91125C (CRhone) board +# Sibyte BCM91125E (Rhone) board +# Sibyte SWARM board +# Sibyte BCM91x80 (BigSur) board +# +load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000 +load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000 +load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000 +load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000 +load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000 +load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000 +load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 |