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| author | Dave Kleikamp <shaggy@austin.ibm.com> | 2006-01-24 14:34:47 -0600 |
|---|---|---|
| committer | Dave Kleikamp <shaggy@austin.ibm.com> | 2006-01-24 14:34:47 -0600 |
| commit | 0a0fc0ddbe732779366ab6b1b879f62195e65967 (patch) | |
| tree | 7b42490a676cf39ae0691b6859ecf7fd410f229b /arch/mips/mm/c-r4k.c | |
| parent | 4d5dbd0945d9e0833dd7964a3d6ee33157f7cc7a (diff) | |
| parent | 3ee68c4af3fd7228c1be63254b9f884614f9ebb2 (diff) | |
| download | linux-0a0fc0ddbe732779366ab6b1b879f62195e65967.tar.gz | |
Merge with /home/shaggy/git/linus-clean/
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 38223b44d962..422b55fab07a 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1183,8 +1183,8 @@ static void __init setup_scache(void) if (!sc_present) return; - if ((c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) && + if ((c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M64R1) && !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); |