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authorPeter Zijlstra <peterz@infradead.org>2019-06-13 15:43:18 +0200
committerPaul Burton <paul.burton@mips.com>2019-08-31 11:03:46 +0100
commitdfc8d8de855d566eb83a27e58a69741de42a90da (patch)
tree20083e6d912de45bded2b55c2d4452bfefcfb2fd /arch/mips/include/asm
parent00f3e689518b8f8d36e333d3b447db18ef22abb3 (diff)
downloadlinux-dfc8d8de855d566eb83a27e58a69741de42a90da.tar.gz
mips/atomic: Fix cmpxchg64 barriers
There were no memory barriers on the 32bit implementation of
cmpxchg64(). Fix this.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/cmpxchg.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index f345a873742d..59cf5cbb3883 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -290,10 +290,13 @@ static inline unsigned long __cmpxchg64(volatile void *ptr,
 	 * will cause a build error unless cpu_has_64bits is a		\
 	 * compile-time constant 1.					\
 	 */								\
-	if (cpu_has_64bits && kernel_uses_llsc)				\
+	if (cpu_has_64bits && kernel_uses_llsc) {			\
+		smp_mb__before_llsc();					\
 		__res = __cmpxchg64((ptr), __old, __new);		\
-	else								\
+		smp_llsc_mb();						\
+	} else {							\
 		__res = __cmpxchg64_unsupported();			\
+	}								\
 									\
 	__res;								\
 })