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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-11-05 08:13:19 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-11-05 08:13:19 -0700 |
| commit | a3f36773802d44d1e50e7c4c09b3e17018581d11 (patch) | |
| tree | 20cd7768ce06c0d8249ff45f35d1ed59fcc325ae /arch/mips/include/asm/mips-cm.h | |
| parent | d4439a1189f93d0ac1eaf0197db8e6b3e197d5c7 (diff) | |
| parent | 36de23a4c5f0b61ceb4812b535422fa6c6e97447 (diff) | |
| download | linux-a3f36773802d44d1e50e7c4c09b3e17018581d11.tar.gz | |
Merge tag 'mips_5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer: - added printing of CPU options for /proc/cpuinfo - removed support for Netlogic SOCs - fixes and cleanup * tag 'mips_5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Cobalt: Explain GT64111 early PCI fixup mips: fix HUGETLB function without THP enabled mips: cm: Convert to bitfield API to fix out-of-bounds access MIPS: Remove NETLOGIC support MIPS: kernel: proc: add CPU option reporting MIPS: kernel: proc: use seq_puts instead of seq_printf MIPS: kernel: proc: fix trivial style errors MIPS: Fix assembly error from MIPSr2 code used within MIPS_ISA_ARCH_LEVEL MIPS: octeon: Remove unused functions MIPS: Loongson64: Add of_node_put() before break bcm47xx: Replace printk(KERN_ALERT ... pci_devname(dev)) with pci_alert() bcm47xx: Get rid of redundant 'else' MIPS: sni: Fix the build MIPS: Avoid macro redefinitions MIPS: loongson64: Fix no screen display during boot-up MIPS: loongson64: make CPU_LOONGSON64 depends on MIPS_FP_SUPPORT
Diffstat (limited to 'arch/mips/include/asm/mips-cm.h')
| -rw-r--r-- | arch/mips/include/asm/mips-cm.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index aeae2effa123..23c67c0871b1 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -11,6 +11,7 @@ #ifndef __MIPS_ASM_MIPS_CM_H__ #define __MIPS_ASM_MIPS_CM_H__ +#include <linux/bitfield.h> #include <linux/bitops.h> #include <linux/errno.h> @@ -153,8 +154,8 @@ GCR_ACCESSOR_RO(32, 0x030, rev) #define CM_GCR_REV_MINOR GENMASK(7, 0) #define CM_ENCODE_REV(major, minor) \ - (((major) << __ffs(CM_GCR_REV_MAJOR)) | \ - ((minor) << __ffs(CM_GCR_REV_MINOR))) + (FIELD_PREP(CM_GCR_REV_MAJOR, major) | \ + FIELD_PREP(CM_GCR_REV_MINOR, minor)) #define CM_REV_CM2 CM_ENCODE_REV(6, 0) #define CM_REV_CM2_5 CM_ENCODE_REV(7, 0) @@ -362,10 +363,10 @@ static inline int mips_cm_revision(void) static inline unsigned int mips_cm_max_vp_width(void) { extern int smp_num_siblings; - uint32_t cfg; if (mips_cm_revision() >= CM_REV_CM3) - return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW; + return FIELD_GET(CM_GCR_SYS_CONFIG2_MAXVPW, + read_gcr_sys_config2()); if (mips_cm_present()) { /* @@ -373,8 +374,7 @@ static inline unsigned int mips_cm_max_vp_width(void) * number of VP(E)s, and if that ever changes then this will * need revisiting. */ - cfg = read_gcr_cl_config() & CM_GCR_Cx_CONFIG_PVPE; - return (cfg >> __ffs(CM_GCR_Cx_CONFIG_PVPE)) + 1; + return FIELD_GET(CM_GCR_Cx_CONFIG_PVPE, read_gcr_cl_config()) + 1; } if (IS_ENABLED(CONFIG_SMP)) |