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| author | Ingo Molnar <mingo@kernel.org> | 2018-04-12 09:42:34 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2018-04-12 09:42:34 +0200 |
| commit | ef389b734691cdc8beb009dd402135dcdcb86a56 (patch) | |
| tree | 9523a37db93cb7c7874a5f18b4d9a7014898b814 /arch/frv/lib/atomic64-ops.S | |
| parent | a774635db5c430cbf21fa5d2f2df3d23aaa8e782 (diff) | |
| parent | c76fc98260751e71c884dc1a18a07e427ef033b5 (diff) | |
| download | linux-ef389b734691cdc8beb009dd402135dcdcb86a56.tar.gz | |
Merge branch 'WIP.x86/asm' into x86/urgent, because the topic is ready
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/frv/lib/atomic64-ops.S')
| -rw-r--r-- | arch/frv/lib/atomic64-ops.S | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/arch/frv/lib/atomic64-ops.S b/arch/frv/lib/atomic64-ops.S deleted file mode 100644 index c4c472308a33..000000000000 --- a/arch/frv/lib/atomic64-ops.S +++ /dev/null @@ -1,68 +0,0 @@ -/* kernel atomic64 operations - * - * For an explanation of how atomic ops work in this arch, see: - * Documentation/frv/atomic-ops.txt - * - * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <asm/spr-regs.h> - - .text - .balign 4 - - -############################################################################### -# -# uint64_t __xchg_64(uint64_t i, uint64_t *v) -# -############################################################################### - .globl __xchg_64 - .type __xchg_64,@function -__xchg_64: - or.p gr8,gr8,gr4 - or gr9,gr9,gr5 -0: - orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */ - ckeq icc3,cc7 - ldd.p @(gr10,gr0),gr8 /* LDD.P/ORCR must be atomic */ - orcr cc7,cc7,cc3 /* set CC3 to true */ - cstd.p gr4,@(gr10,gr0) ,cc3,#1 - corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */ - beq icc3,#0,0b - bralr - - .size __xchg_64, .-__xchg_64 - -############################################################################### -# -# uint64_t __cmpxchg_64(uint64_t test, uint64_t new, uint64_t *v) -# -############################################################################### - .globl __cmpxchg_64 - .type __cmpxchg_64,@function -__cmpxchg_64: - or.p gr8,gr8,gr4 - or gr9,gr9,gr5 -0: - orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */ - ckeq icc3,cc7 - ldd.p @(gr12,gr0),gr8 /* LDD.P/ORCR must be atomic */ - orcr cc7,cc7,cc3 - subcc gr8,gr4,gr0,icc0 - subcc.p gr9,gr5,gr0,icc1 - bnelr icc0,#0 - bnelr icc1,#0 - cstd.p gr10,@(gr12,gr0) ,cc3,#1 - corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */ - beq icc3,#0,0b - bralr - - .size __cmpxchg_64, .-__cmpxchg_64 - |