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| author | Nicolas Saenz Julienne <nsaenzjulienne@suse.de> | 2020-02-26 17:46:00 +0100 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-02-27 11:29:45 -0800 |
| commit | 94f18b9b24ee4d812ebd30ff848298a9f413f07a (patch) | |
| tree | 7284e2d65c77ec837a1b406a7b71f5b1d9c2a475 /arch/arm | |
| parent | bff211bab301db890e38de872d43cbb459940daa (diff) | |
| download | linux-94f18b9b24ee4d812ebd30ff848298a9f413f07a.tar.gz | |
ARM: dts: bcm2711: Add pcie0 alias
Some bcm2711 revisions have different DMA constraints on the their PCIE
bus. The lower common denominator, being able to access the lower 3GB of
memory, is the default setting for now. Newer SoC revisions are able to
access the whole memory space.
Raspberry Pi 4's firmware is aware of this limitation and will correct
the PCIE's dma-ranges property if a pcie0 alias is available. So add
it.
Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts index b8c4b5bb265a..efea891b1a76 100644 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts @@ -21,6 +21,7 @@ aliases { ethernet0 = &genet; + pcie0 = &pcie0; }; leds { |