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authorKomal Shah <komal_shah802003@yahoo.com>2006-09-25 12:41:39 +0300
committerTony Lindgren <tony@atomide.com>2006-09-25 12:41:39 +0300
commite4d5ee8109c210b65becfc1ef7697a0ce4eaf3c4 (patch)
tree3012d2fdbab839be8dbb6b25f536403e205d5d07 /arch/arm
parent4196dd6baabccdef3786c1d51d75e041313af848 (diff)
downloadlinux-e4d5ee8109c210b65becfc1ef7697a0ce4eaf3c4.tar.gz
ARM: OMAP: Remove IVA IRQ bank
ARM11 can't access the IVA interrupt controller from
IVA slave port.

From Richard Woodruff:

"The 0x40000000 is an IVA-ARM7 local bus address.
The IVA-INTC is NOT accessible through the IVA-L3-Slave Port.
The current TRM does say this directly and indirectly in a few spots and
in figures."

Signed-off-by: Komal Shah <komal_shah802003@yahoo.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/irq.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index dfc3b35cc1ff..1ed2fff4691a 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -41,18 +41,6 @@ static struct omap_irq_bank {
 		.nr_irqs	= 96,
 	}, {
 		/* XXX: DSP INTC */
-
-#if 0
-	/*
-	 * Commented out for now until we fix the IVA clocking
-	 */
-#ifdef CONFIG_ARCH_OMAP2420
-	}, {
-		/* IVA INTC (2420 only) */
-		.base_reg	= OMAP24XX_IVA_INTC_BASE,
-		.nr_irqs	= 16,	/* Actually 32, but only 16 are used */
-#endif
-#endif
 	}
 };